Searched refs:GPIO1_IOC_BASE (Results 1 – 3 of 3) sorted by relevance
76 #define GPIO1_IOC_BASE 0xFF560000 macro81 #define GPIO1_IOC_GPIO1D_IOMUX_SEL_L (GPIO1_IOC_BASE + 0x38)82 #define GPIO1_IOC_GPIO1C_DS_2 (GPIO1_IOC_BASE + 0x148)83 #define GPIO1_IOC_GPIO1C_DS_3 (GPIO1_IOC_BASE + 0x14C)84 #define GPIO1_IOC_GPIO1D_DS_0 (GPIO1_IOC_BASE + 0x150)85 #define GPIO1_IOC_GPIO1D_DS_1 (GPIO1_IOC_BASE + 0x154)86 #define GPIO1_IOC_GPIO1D_DS_2 (GPIO1_IOC_BASE + 0x158)111 #define UART1_RX_M0_ADDR (GPIO1_IOC_BASE + 0x84)115 #define UART1_TX_M0_ADDR (GPIO1_IOC_BASE + 0x84)139 #define UART2_RX_M1_ADDR (GPIO1_IOC_BASE + 0x28)[all …]
128 #define GPIO1_IOC_BASE 0xFF060000 macro157 #define UART0_RX_M1_ADDR (GPIO1_IOC_BASE + 0x08)161 #define UART0_TX_M1_ADDR (GPIO1_IOC_BASE + 0x0C)167 #define UART1_RX_M0_ADDR (GPIO1_IOC_BASE + 0x18)171 #define UART1_TX_M0_ADDR (GPIO1_IOC_BASE + 0x18)233 #define UART4_RX_M1_ADDR (GPIO1_IOC_BASE + 0x1C)237 #define UART4_TX_M1_ADDR (GPIO1_IOC_BASE + 0x1C)243 #define UART5_RX_M0_ADDR (GPIO1_IOC_BASE + 0xC)247 #define UART5_TX_M0_ADDR (GPIO1_IOC_BASE + 0x10)290 #define UART7_RX_M1_ADDR (GPIO1_IOC_BASE + 0x08)[all …]
116 #define GPIO1_IOC_BASE 0xFF538000 macro141 #define UART0_RX_M0_ADDR (GPIO1_IOC_BASE)145 #define UART0_TX_M0_ADDR (GPIO1_IOC_BASE)169 #define UART1_RX_M0_ADDR (GPIO1_IOC_BASE + 0x4)173 #define UART1_TX_M0_ADDR (GPIO1_IOC_BASE)206 #define UART2_RX_M1_ADDR (GPIO1_IOC_BASE + 0x8)210 #define UART2_TX_M1_ADDR (GPIO1_IOC_BASE + 0x8)216 #define UART3_RX_M0_ADDR (GPIO1_IOC_BASE)220 #define UART3_TX_M0_ADDR (GPIO1_IOC_BASE)225 #define UART3_RX_M1_ADDR (GPIO1_IOC_BASE + 0x18)[all …]