Searched refs:GIC_DIST_ENABLE_SET (Results 1 – 6 of 6) sorted by relevance
48 readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + in rkpm_gicv2_dist_save()95 dist_base + GIC_DIST_ENABLE_SET + (i >> 5 << 2)); in rkpm_gicv2_dist_restore()111 readl_relaxed(dist_base + GIC_DIST_ENABLE_SET); in rkpm_gicv2_cpu_save()144 writel_relaxed(ctx->saved_ppi_enable, dist_base + GIC_DIST_ENABLE_SET); in rkpm_gicv2_cpu_restore()
97 er = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); in prcmu_gic_pending_irq()150 GIC_DIST_ENABLE_SET + (i + 1) * 4); in prcmu_copy_gic_settings()
217 gic_poke_irq(d, GIC_DIST_ENABLE_SET); in gic_unmask_irq()259 reg = val ? GIC_DIST_ENABLE_CLEAR : GIC_DIST_ENABLE_SET; in gic_irq_set_irqchip_state()283 *val = !gic_peek_irq(d, GIC_DIST_ENABLE_SET); in gic_irq_get_irqchip_state()601 readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); in gic_dist_save()648 dist_base + GIC_DIST_ENABLE_SET + i * 4); in gic_dist_restore()683 ptr[i] = readl_relaxed(dist_base + GIC_DIST_ENABLE_SET + i * 4); in gic_cpu_save()715 writel_relaxed(ptr[i], dist_base + GIC_DIST_ENABLE_SET + i * 4); in gic_cpu_restore()
106 writel_relaxed(mask, hip04_dist_base(d) + GIC_DIST_ENABLE_SET + in hip04_unmask_irq()
47 #define GIC_DIST_ENABLE_SET 0x100 macro
411 REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_ENABLE_SET,