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Searched refs:Fld (Results 1 – 11 of 11) sorted by relevance

/OK3568_Linux_fs/kernel/arch/arm/mach-sa1100/include/mach/
H A DSA-1100.h137 #define UDCAR_ADD Fld (7, 0) /* function ADDress */
139 #define UDCOMP_OUTMAXP Fld (8, 0) /* OUTput MAXimum Packet size - 1 */
145 #define UDCIMP_INMAXP Fld (8, 0) /* INput MAXimum Packet size - 1 */
177 #define UDCD0_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
179 #define UDCWC_WC Fld (4, 0) /* Write Count */
181 #define UDCDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
337 #define UTCR1_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */
338 #define UTCR2_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */
378 #define UTDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
474 #define SDCR2_AMV Fld (8, 0) /* Address Match Value */
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H A Dbitfield.h46 #define Fld(Size, Shft) (((Size) << 16) + (Shft)) macro
/OK3568_Linux_fs/u-boot/include/
H A DSA-1100.h280 #define UDCAR_ADD Fld (7, 0) /* function ADDress */
282 #define UDCOMP_OUTMAXP Fld (8, 0) /* OUTput MAXimum Packet size - 1 */
288 #define UDCIMP_INMAXP Fld (8, 0) /* INput MAXimum Packet size - 1 */
320 #define UDCD0_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
322 #define UDCWC_WC Fld (4, 0) /* Write Count */
324 #define UDCDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
551 #define UTCR1_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */
552 #define UTCR2_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */
592 #define UTDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */
707 #define SDCR2_AMV Fld (8, 0) /* Address Match Value */
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/OK3568_Linux_fs/kernel/arch/arm/mach-pxa/include/mach/
H A Dregs-lcd.h89 #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */
92 #define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */
95 #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait - 1 */
98 #define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */
101 #define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */
104 #define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse - 1 */
107 #define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */
110 #define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */
126 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */
129 #define LCCR3_ACB Fld (8, 8) /* AC Bias */
H A Dbitfield.h47 #define Fld(Size, Shft) (((Size) << 16) + (Shft)) macro
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h2134 #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */
2138 #define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */
2143 #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */
2149 #define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */
2156 #define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */
2160 #define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */
2166 #define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */
2172 #define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */
2192 #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */
2197 #define LCCR3_BPP Fld (3, 24) /* Bit Per Pixel */
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H A Dbitfield.h45 #define Fld(Size, Shft) (((Size) << 16) + (Shft)) macro
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-sa1100/
H A Dbitfield.h45 #define Fld(Size, Shft) (((Size) << 16) + (Shft)) macro
/OK3568_Linux_fs/kernel/arch/arm/include/asm/hardware/
H A Dsa1111.h67 #define SMCR_DRAC Fld(3, 2)
/OK3568_Linux_fs/buildroot/dl/ncurses/
HDncurses-6.1-20190609-patch.sh.bz21#!/bin/sh 2# Use this script to patch ncurses 6.1 to 6.1 ( ...
HDncurses-6.1-20200118.patch.gz1# ncurses 6.1 - patch 20200118 - Thomas E. Dickey 2# 3# --- ...