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Searched refs:CLK_TOP_APLL2_SEL (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt7622-clk.h100 #define CLK_TOP_APLL2_SEL 88 macro
H A Dmt2712-clk.h171 #define CLK_TOP_APLL2_SEL 140 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt7622.c595 MUX(CLK_TOP_APLL2_SEL, "apll2_ck_sel", apll1_ck_parents,
H A Dclk-mt2712.c830 MUX_GATE(CLK_TOP_APLL2_SEL, "apll2_sel",