Home
last modified time | relevance | path

Searched refs:CLK_REF_PIPE_PHY2 (Results 1 – 6 of 6) sorted by relevance

/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3588.c1443 case CLK_REF_PIPE_PHY2: in rk3588_pciephy_get_rate()
1490 case CLK_REF_PIPE_PHY2: in rk3588_pciephy_set_rate()
1645 case CLK_REF_PIPE_PHY2: in rk3588_clk_get_rate()
1794 case CLK_REF_PIPE_PHY2: in rk3588_clk_set_rate()
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3588-cru.h697 #define CLK_REF_PIPE_PHY2 703 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3588-cru.h699 #define CLK_REF_PIPE_PHY2 703 macro
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3588s.dtsi2308 clocks = <&cru CLK_REF_PIPE_PHY2>, <&cru PCLK_PCIE_COMBO_PIPE_PHY2>;
2310 assigned-clocks = <&cru CLK_REF_PIPE_PHY2>;
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3588.c2127 MUX(CLK_REF_PIPE_PHY2, "clk_ref_pipe_phy2", clk_ref_pipe_phy2_p, CLK_SET_RATE_PARENT,
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588s.dtsi6725 clocks = <&cru CLK_REF_PIPE_PHY2>, <&cru PCLK_PCIE_COMBO_PIPE_PHY2>,
6728 assigned-clocks = <&cru CLK_REF_PIPE_PHY2>;