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Searched refs:CLK_PWM0_DIV_CON_SHIFT (Results 1 – 4 of 4) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk1808.h285 CLK_PWM0_DIV_CON_SHIFT = 0, enumerator
H A Dcru_px30.h416 CLK_PWM0_DIV_CON_SHIFT = 0, enumerator
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_px30.c658 div = con >> CLK_PWM0_DIV_CON_SHIFT & CLK_PWM_DIV_CON_MASK; in px30_pwm_get_clk()
683 CLK_PWM_DIV_CON_MASK << CLK_PWM0_DIV_CON_SHIFT | in px30_pwm_set_clk()
685 (src_clk_div - 1) << CLK_PWM0_DIV_CON_SHIFT | in px30_pwm_set_clk()
H A Dclk_rk1808.c329 div = (con & CLK_PWM0_DIV_CON_MASK) >> CLK_PWM0_DIV_CON_SHIFT; in rk1808_pwm_get_clk()
360 (src_clk_div - 1) << CLK_PWM0_DIV_CON_SHIFT | in rk1808_pwm_set_clk()