Searched refs:BUS_HCLK_HZ (Results 1 – 4 of 4) sorted by relevance
20 #define BUS_HCLK_HZ 148500000 macro
20 #define BUS_HCLK_HZ 100000000 macro
150 hclk_div = BUS_ACLK_HZ / BUS_HCLK_HZ - 1; in rkclk_init()151 assert((hclk_div + 1) * BUS_HCLK_HZ <= BUS_ACLK_HZ && hclk_div <= 0x3); in rkclk_init()
1279 rk3308_bus_set_clk(priv, HCLK_BUS, BUS_HCLK_HZ); in rk3308_clk_init()