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/rk3399_ARM-atf/drivers/st/crypto/
H A Dstm32_hash.c126 int ret; in hash_write_data() local
128 ret = hash_wait_busy(); in hash_write_data()
129 if (ret != 0) { in hash_write_data()
130 return ret; in hash_write_data()
182 int ret; in hash_get_digest() local
186 ret = hash_wait_computation(); in hash_get_digest()
187 if (ret != 0) { in hash_get_digest()
188 return ret; in hash_get_digest()
211 int ret = 0; in stm32_hash_update() local
217 ret = clk_enable(stm32_hash.clock); in stm32_hash_update()
[all …]
H A Dstm32_pka.c398 int ret; in stm32_pka_ecdsa_verif_configure_curve() local
405 ret = write_eo_data(base + _PKA_RAM_A, curve_def[cid].a, curve_def[cid].a_size, eo_nbw); in stm32_pka_ecdsa_verif_configure_curve()
406 if (ret < 0) { in stm32_pka_ecdsa_verif_configure_curve()
407 return ret; in stm32_pka_ecdsa_verif_configure_curve()
410 ret = write_eo_data(base + _PKA_RAM_PRIME_N, in stm32_pka_ecdsa_verif_configure_curve()
413 if (ret < 0) { in stm32_pka_ecdsa_verif_configure_curve()
414 return ret; in stm32_pka_ecdsa_verif_configure_curve()
417 ret = write_eo_data(base + _PKA_RAM_P, curve_def[cid].p, in stm32_pka_ecdsa_verif_configure_curve()
419 if (ret < 0) { in stm32_pka_ecdsa_verif_configure_curve()
420 return ret; in stm32_pka_ecdsa_verif_configure_curve()
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/emi/
H A Demi_ctrl.c78 enum mtk_bl31_status ret; in sip_emidbg_control() local
87 ret = emi_mpu_read_by_type((unsigned int)x2, (unsigned int)x3, in sip_emidbg_control()
92 ret = emi_clear_md_violation(); in sip_emidbg_control()
95 ret = emi_kp_clear_violation((unsigned int)x2); in sip_emidbg_control()
99 ret = slb_clear_violation((unsigned int)x2); in sip_emidbg_control()
104 ret = emi_clear_violation((unsigned int)x2, (unsigned int)x3); in sip_emidbg_control()
109 ret = slc_parity_select((unsigned int)x2, (unsigned int)x3); in sip_emidbg_control()
112 ret = slc_parity_clear((unsigned int)x2); in sip_emidbg_control()
119 return mtk_bl31_map_to_sip_error(ret); in sip_emidbg_control()
130 enum mtk_bl31_status ret; in sip_emimpu_control() local
[all …]
/rk3399_ARM-atf/lib/debugfs/
H A Ddebugfs_smc.c72 int ret; in debugfs_smc_handler() local
105 ret = mmap_add_dynamic_region(arg2, in debugfs_smc_handler()
109 if (ret == 0) { in debugfs_smc_handler()
123 ret = mount(parms.mount.srv, in debugfs_smc_handler()
126 if (ret == 0) { in debugfs_smc_handler()
133 ret = open(parms.open.fname, arg2); in debugfs_smc_handler()
134 if (ret >= 0) { in debugfs_smc_handler()
136 smc_resp = ret; in debugfs_smc_handler()
141 ret = close(arg2); in debugfs_smc_handler()
142 if (ret == 0) { in debugfs_smc_handler()
[all …]
/rk3399_ARM-atf/services/std_svc/lfa/
H A Dlfa_main.c38 static int convert_to_lfa_error(int ret) in convert_to_lfa_error() argument
40 switch (ret) { in convert_to_lfa_error()
88 int ret = LFA_SUCCESS; in lfa_cancel() local
100 ret = plat_lfa_cancel(component_id); in lfa_cancel()
101 if (ret != LFA_SUCCESS) { in lfa_cancel()
108 return ret; in lfa_cancel()
114 int ret = LFA_ACTIVATION_FAILED; in lfa_activate() local
133 ret = plat_lfa_notify_activate(component_id); in lfa_activate()
134 if (ret != 0) { in lfa_activate()
159 ret = activator->activate(&current_activation, ep_address, in lfa_activate()
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/rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/drivers/se/
H A Dsecurity_engine.c145 int32_t ret = 0; in tegra_se_operation_complete() local
159 ret = -ETIMEDOUT; in tegra_se_operation_complete()
163 if (ret == 0) { in tegra_se_operation_complete()
174 ret = -ETIMEDOUT; in tegra_se_operation_complete()
179 if (ret == 0) { in tegra_se_operation_complete()
189 ret = -ETIMEDOUT; in tegra_se_operation_complete()
194 if (ret == 0) { in tegra_se_operation_complete()
198 ret = -ENOTSUP; in tegra_se_operation_complete()
202 return ret; in tegra_se_operation_complete()
211 int32_t ret = 0; in tegra_se_operation_prepare() local
[all …]
/rk3399_ARM-atf/plat/mediatek/common/lpm/
H A Dmt_lp_api.c11 int ret, val; in mt_audio_update() local
17 ret = mt_lp_rm_do_update(-1, PLAT_RC_IS_FMAUDIO, &val); in mt_audio_update()
22 ret = mt_lp_rm_do_update(-1, PLAT_RC_IS_ADSP, &val); in mt_audio_update()
25 ret = -1; in mt_audio_update()
29 return ret; in mt_audio_update()
34 int ret, val; in mtk_usb_update() local
40 ret = mt_lp_rm_do_update(-1, PLAT_RC_IS_USB_INFRA, &val); in mtk_usb_update()
43 ret = -1; in mtk_usb_update()
47 return ret; in mtk_usb_update()
/rk3399_ARM-atf/lib/psa/
H A Dcca_attestation.c21 psa_status_t ret = PSA_SUCCESS; in cca_attestation_get_realm_key() local
34 ret = rse_delegated_attest_get_delegated_key(PSA_ECC_FAMILY_SECP_R1, in cca_attestation_get_realm_key()
37 if (ret != PSA_SUCCESS) { in cca_attestation_get_realm_key()
38 return ret; in cca_attestation_get_realm_key()
47 return ret; in cca_attestation_get_realm_key()
55 psa_status_t ret = PSA_SUCCESS; in cca_attestation_get_plat_token() local
57 ret = rse_delegated_attest_get_token((const uint8_t *)hash, hash_size, in cca_attestation_get_plat_token()
59 if (ret != PSA_SUCCESS) { in cca_attestation_get_plat_token()
60 return ret; in cca_attestation_get_plat_token()
65 return ret; in cca_attestation_get_plat_token()
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/drivers/se/
H A Dse.c56 int32_t ret = 0; in tegra_se_is_operation_complete() local
88 ret = -ECANCELED; in tegra_se_is_operation_complete()
91 return (ret == 0); in tegra_se_is_operation_complete()
100 int32_t ret = 0; in tegra_se_is_ready() local
119 ret = -ETIMEDOUT; in tegra_se_is_ready()
134 return (ret == 0); in tegra_se_is_ready()
143 int32_t ret = -ECANCELED; in tegra_se_save_context() local
178 ret = 0; in tegra_se_save_context()
182 return ret; in tegra_se_save_context()
236 int32_t ret = 0; in tegra_se_start_normal_operation() local
[all …]
/rk3399_ARM-atf/plat/intel/soc/common/
H A Dsocfpga_ros.c50 uint32_t ret; in get_current_image_index() local
58 ret = mailbox_rsu_status(rsu_status, RSU_STATUS_RES_SIZE); in get_current_image_index()
59 if (ret != MBOX_RET_OK) { in get_current_image_index()
88 int ret; in load_and_check_spt() local
92 ret = cad_qspi_read(spt_ptr, offset, SPT_SIZE); in load_and_check_spt()
93 if (ret != 0U) { in load_and_check_spt()
125 uint32_t ret; in get_spt() local
129 ret = mailbox_rsu_get_spt_offset(spt_offset, RSU_GET_SPT_RESP_SIZE); in get_spt()
130 if (ret != MBOX_RET_OK) { in get_spt()
140 ret = load_and_check_spt(spt_buf, ADDR_64(spt_offset[2], spt_offset[3])); in get_spt()
[all …]
/rk3399_ARM-atf/plat/nxp/s32/s32g274ardb2/
H A Dplat_bl31_setup.c40 int ret; in bl31_plat_arch_setup() local
42 ret = s32cc_bl_mmu_setup(); in bl31_plat_arch_setup()
43 if (ret != 0) { in bl31_plat_arch_setup()
58 int ret; in mmap_gic() local
60 ret = mmap_add_dynamic_region(gic_data->gicd_base, in mmap_gic()
64 if (ret != 0) { in mmap_gic()
65 return ret; in mmap_gic()
69 ret = mmap_add_dynamic_region(gic_data->gicr_base, in mmap_gic()
73 if (ret != 0) { in mmap_gic()
74 return ret; in mmap_gic()
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8195/
H A Dplat_sip_calls.c27 int32_t ret; in mediatek_plat_sip_handler() local
33 ret = emi_mpu_sip_handler(x1, x2, x3); in mediatek_plat_sip_handler()
34 SMC_RET1(handle, ret); in mediatek_plat_sip_handler()
38 ret = dp_secure_handler(x1, x2, &ret_val); in mediatek_plat_sip_handler()
39 SMC_RET2(handle, ret, ret_val); in mediatek_plat_sip_handler()
43 ret = spm_vcorefs_v2_args(x1, x2, x3, &x4); in mediatek_plat_sip_handler()
44 SMC_RET2(handle, ret, x4); in mediatek_plat_sip_handler()
48 ret = dfd_smc_dispatcher(x1, x2, x3, x4); in mediatek_plat_sip_handler()
49 SMC_RET1(handle, ret); in mediatek_plat_sip_handler()
53 ret = apusys_kernel_ctrl(x1, x2, x3, x4, &ret_val); in mediatek_plat_sip_handler()
[all …]
/rk3399_ARM-atf/drivers/nxp/crypto/caam/src/auth/
H A Dnxp_crypto.c46 int ret = CRYPTO_SUCCESS; in verify_signature() local
53 ret = rsa_verify_signature(data_ptr, data_len, sig_ptr, sig_len, in verify_signature()
58 ret = CRYPTO_ERR_SIGNATURE; in verify_signature()
62 if (ret != 0) { in verify_signature()
65 return ret; in verify_signature()
81 int i = 0, ret = 0; in verify_hash() local
88 ret = hash_init(algo, &ctx); in verify_hash()
89 if (ret != 0) { in verify_hash()
94 ret = hash_update(algo, ctx, data_ptr, data_len); in verify_hash()
95 if (ret != 0) { in verify_hash()
[all …]
/rk3399_ARM-atf/plat/xilinx/common/
H A Dplat_console.c89 int32_t ret = 0; in get_baudrate() local
98 ret = -FDT_ERR_NOTFOUND; in get_baudrate()
105 ret = -FDT_ERR_NOTFOUND; in get_baudrate()
112 ret = -FDT_ERR_NOTFOUND; in get_baudrate()
119 ret = -FDT_ERR_NOTFOUND; in get_baudrate()
122 ret = baud_rate; in get_baudrate()
126 return ret; in get_baudrate()
163 int32_t ret = 0; in fdt_add_uart_info() local
171 ret = -FDT_ERR_NOTFOUND; in fdt_add_uart_info()
178 ret = -FDT_ERR_NOTFOUND; in fdt_add_uart_info()
[all …]
/rk3399_ARM-atf/lib/psci/
H A Dpsci_main.c392 unsigned int ret = ((FF_PSTATE << FF_PSTATE_SHIFT) | in psci_features() local
394 return (int)ret; in psci_features()
451 u_register_t ret; in psci_smc_handler() local
471 ret = (u_register_t)psci_version(); in psci_smc_handler()
475 ret = (u_register_t)psci_cpu_off(); in psci_smc_handler()
479 ret = (u_register_t)psci_cpu_suspend(r1, r2, r3); in psci_smc_handler()
483 ret = (u_register_t)psci_cpu_on(r1, r2, r3); in psci_smc_handler()
487 ret = (u_register_t)psci_affinity_info(r1, r2); in psci_smc_handler()
491 ret = (u_register_t)psci_migrate(r1); in psci_smc_handler()
495 ret = (u_register_t)psci_migrate_info_type(); in psci_smc_handler()
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/rk3399_ARM-atf/plat/socionext/synquacer/drivers/scp/
H A Dsq_scmi.c102 int lvl = 0, ret; in sq_scmi_off() local
121 ret = scmi_pwr_state_set(sq_scmi_handle, in sq_scmi_off()
125 if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { in sq_scmi_off()
127 ret); in sq_scmi_off()
138 int lvl = 0, ret, core_pos; in sq_scmi_on() local
150 ret = scmi_pwr_state_set(sq_scmi_handle, in sq_scmi_on()
154 if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { in sq_scmi_on()
156 ret); in sq_scmi_on()
163 int ret; in sq_scmi_system_off() local
175 ret = scmi_sys_pwr_state_set(sq_scmi_handle, in sq_scmi_system_off()
[all …]
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/mcdi/
H A Dmt_lp_irqremain.c19 int ret = 0; in mt_lp_irqremain_submit() local
22 ret = -1; in mt_lp_irqremain_submit()
28 return ret; in mt_lp_irqremain_submit()
33 int ret = 0; in mt_lp_irqremain_aquire() local
36 ret = -1; in mt_lp_irqremain_aquire()
43 return ret; in mt_lp_irqremain_aquire()
48 int ret = 0; in mt_lp_irqremain_release() local
51 ret = -1; in mt_lp_irqremain_release()
57 return ret; in mt_lp_irqremain_release()
/rk3399_ARM-atf/services/std_svc/rmmd/
H A Drmmd_rmm_lfa.c24 int ret = LFA_SUCCESS; in lfa_rmm_activate() local
31 ret = rmmd_primary_activate(); in lfa_rmm_activate()
36 if (ret == LFA_SUCCESS) { in lfa_rmm_activate()
41 ret = LFA_BUSY; in lfa_rmm_activate()
44 lfa_holding_release(ret); in lfa_rmm_activate()
52 ret = lfa_holding_wait(); in lfa_rmm_activate()
54 if (ret == LFA_SUCCESS) { in lfa_rmm_activate()
56 ret = rmmd_secondary_activate(); in lfa_rmm_activate()
63 return ret; in lfa_rmm_activate()
/rk3399_ARM-atf/plat/nxp/common/warm_reset/
H A Dplat_warm_reset.c31 uint32_t ret = mmio_read_32(NXP_RESET_ADDR + RST_RSTRQSR1_OFFSET) in is_warm_boot() local
36 if (ret == 0U) { in is_warm_boot()
41 ret = (nv_app_data->warm_rst_flag == WARM_BOOT_SUCCESS) ? 1 : 0; in is_warm_boot()
43 if (ret != 0U) { in is_warm_boot()
49 return ret; in is_warm_boot()
62 int ret; in prep_n_execute_warm_reset()
65 ret = fspi_init(NXP_FLEXSPI_ADDR, NXP_FLEXSPI_FLASH_ADDR); in prep_n_execute_warm_reset()
67 if (ret != 0) { in prep_n_execute_warm_reset()
78 ret = xspi_write((uint32_t)NV_STORAGE_BASE_ADDR, in prep_n_execute_warm_reset()
83 ret = xspi_wren((uint32_t)NV_STORAGE_BASE_ADDR); in prep_n_execute_warm_reset()
/rk3399_ARM-atf/plat/mediatek/mt8196/drivers/dcm/
H A Dmtk_dcm_utils.c135 bool ret = true; in dcm_mcusys_par_wrap_mcu_io_dcm_is_on() local
137 ret &= dcm_check_state(MCUSYS_PAR_WRAP_QDCM_CONFIG0, in dcm_mcusys_par_wrap_mcu_io_dcm_is_on()
140 ret &= dcm_check_state(MCUSYS_PAR_WRAP_L3GIC_ARCH_CG_CONFIG, in dcm_mcusys_par_wrap_mcu_io_dcm_is_on()
144 return ret; in dcm_mcusys_par_wrap_mcu_io_dcm_is_on()
168 bool ret = true; in dcm_mcusys_par_wrap_mcu_bus_qdcm_is_on() local
170 ret &= dcm_check_state(MCUSYS_PAR_WRAP_QDCM_CONFIG0, in dcm_mcusys_par_wrap_mcu_bus_qdcm_is_on()
173 ret &= dcm_check_state(MCUSYS_PAR_WRAP_QDCM_CONFIG1, in dcm_mcusys_par_wrap_mcu_bus_qdcm_is_on()
177 return ret; in dcm_mcusys_par_wrap_mcu_bus_qdcm_is_on()
201 bool ret = true; in dcm_mcusys_par_wrap_mcu_core_qdcm_is_on() local
203 ret &= dcm_check_state(MCUSYS_PAR_WRAP_QDCM_CONFIG2, in dcm_mcusys_par_wrap_mcu_core_qdcm_is_on()
[all …]
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/drivers/mce/
H A Dari.c85 int32_t ret = 0; in ari_request_wait() local
99 ret = 0; in ari_request_wait()
105 ret = 0; in ari_request_wait()
134 return ret; in ari_request_wait()
139 int32_t ret = 0; in ari_enter_cstate() local
147 ret = EINVAL; in ari_enter_cstate()
153 ret = ari_request_wait(ari_base, ARI_EVT_MASK_STANDBYWFI_BIT, in ari_enter_cstate()
157 return ret; in ari_enter_cstate()
200 int32_t ret = 0; in ari_update_crossover_time() local
205 ret = EINVAL; in ari_update_crossover_time()
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/ufs/
H A Dufs_ctrl.c51 int ret = -1; in ufs_rsc_ctrl() local
54 ret = mt_lp_resource_user_register("UFS", &ufs_res_user); in ufs_rsc_ctrl()
56 if (ret) { in ufs_rsc_ctrl()
58 return ret; in ufs_rsc_ctrl()
63 ret = ufs_res_user.request(&ufs_res_user, rsc); in ufs_rsc_ctrl()
65 ret = ufs_res_user.release(&ufs_res_user); in ufs_rsc_ctrl()
69 if (ret) in ufs_rsc_ctrl()
72 return ret; in ufs_rsc_ctrl()
108 uint64_t ret = 0; in ufs_knl_ctrl() local
141 ret = -1; in ufs_knl_ctrl()
[all …]
/rk3399_ARM-atf/plat/renesas/rcar/
H A Dbl2_plat_setup.c157 int ret, node; in bl2_lossy_gen_fdt() local
166 node = ret = fdt_add_subnode(fdt, fcnlnode, nodename); in bl2_lossy_gen_fdt()
167 if (ret < 0) { in bl2_lossy_gen_fdt()
168 NOTICE("BL2: Cannot create FCNL node (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
172 ret = fdt_setprop_string(fdt, node, "compatible", in bl2_lossy_gen_fdt()
174 if (ret < 0) { in bl2_lossy_gen_fdt()
175 NOTICE("BL2: Cannot add FCNL compat string (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
179 ret = fdt_appendprop_string(fdt, node, "compatible", in bl2_lossy_gen_fdt()
181 if (ret < 0) { in bl2_lossy_gen_fdt()
182 NOTICE("BL2: Cannot append FCNL compat string (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
[all …]
/rk3399_ARM-atf/plat/renesas/rzg/
H A Dbl2_plat_setup.c152 int ret, node; in bl2_lossy_gen_fdt() local
162 node = ret = fdt_add_subnode(fdt, fcnlnode, nodename); in bl2_lossy_gen_fdt()
163 if (ret < 0) { in bl2_lossy_gen_fdt()
164 NOTICE("BL2: Cannot create FCNL node (ret=%i)\n", ret); in bl2_lossy_gen_fdt()
168 ret = fdt_setprop_string(fdt, node, "compatible", in bl2_lossy_gen_fdt()
170 if (ret < 0) { in bl2_lossy_gen_fdt()
172 "renesas,lossy-decompression", ret); in bl2_lossy_gen_fdt()
176 ret = fdt_appendprop_string(fdt, node, "compatible", in bl2_lossy_gen_fdt()
178 if (ret < 0) { in bl2_lossy_gen_fdt()
180 "shared-dma-pool", ret); in bl2_lossy_gen_fdt()
[all …]
/rk3399_ARM-atf/drivers/mtd/spi-mem/
H A Dspi_mem.c91 int ret; in spi_mem_set_speed_mode() local
93 ret = ops->set_speed(spi_slave.max_hz); in spi_mem_set_speed_mode()
94 if (ret != 0) { in spi_mem_set_speed_mode()
95 VERBOSE("Cannot set speed (err=%d)\n", ret); in spi_mem_set_speed_mode()
96 return ret; in spi_mem_set_speed_mode()
99 ret = ops->set_mode(spi_slave.mode); in spi_mem_set_speed_mode()
100 if (ret != 0) { in spi_mem_set_speed_mode()
101 VERBOSE("Cannot set mode (err=%d)\n", ret); in spi_mem_set_speed_mode()
102 return ret; in spi_mem_set_speed_mode()
152 int ret; in spi_mem_exec_op() local
[all …]

12345678910>>...30