Merge "style: remove useless trailing semicolon and line continuations" into integration

style: remove useless trailing semicolon and line continuations

found using checkpatch.pl[1]

[1]: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/util/lint/checkpatch.pl

S

style: remove useless trailing semicolon and line continuations

found using checkpatch.pl[1]

[1]: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/util/lint/checkpatch.pl

Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Change-Id: I7957c9694300fefb85d11f7819c43af95271f14c

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Merge pull request #1776 from vwadekar/tf2.0-tegra-downstream-rebase-1.22.19

Tf2.0 tegra downstream rebase 1.22.19

Tegra186: mce: get the "right" uncore command/response bits

This patch corrects the logic to read the uncore command/response bits
from the command/response values. The previous logic tapped into in

Tegra186: mce: get the "right" uncore command/response bits

This patch corrects the logic to read the uncore command/response bits
from the command/response values. The previous logic tapped into incorrect
bits leading to garbage counter values.

Change-Id: Ib8327ca3cb3d2086bb268e9a5366865cdf35b493
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra186: mce: use udelay() to calculate timeouts

This patch modifies the timeout loop to use udelay() instead of
mdelay(). This helps with the boot time on some platforms which
issue a lot of MCE c

Tegra186: mce: use udelay() to calculate timeouts

This patch modifies the timeout loop to use udelay() instead of
mdelay(). This helps with the boot time on some platforms which
issue a lot of MCE calls and every mdelay adds up increasing the
boot time by a lot.

Change-Id: Ic50081b73e1cbc2714361235b5c396e294b8f752
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #1764 from vwadekar/tf2.0-tegra-downstream-rebase-1.7.19

Tf2.0 tegra downstream rebase 1.7.19

Tegra: fix defects flagged by MISRA Rule 10.3

MISRA Rule 10.3, the value of an expression shall not be assigned to
an object with a narrower essential type or of a different essential
type category.

Tegra: fix defects flagged by MISRA Rule 10.3

MISRA Rule 10.3, the value of an expression shall not be assigned to
an object with a narrower essential type or of a different essential
type category.

The essential type of a enum member is anonymous enum, the enum member
should be casted to the right type when using it.

Both UL and ULL suffix equal to uint64_t constant in compiler
aarch64-linux-gnu-gcc, to avoid confusing, only keep U and ULL suffix
in platform code. So in some case, cast a constant to uint32_t is
necessary.

Change-Id: I1aae8cba81ef47481736e7f95f53570de7013187
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

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Merge pull request #1733 from vwadekar/tf2.0-tegra-downstream-rebase-1.3.19

Tegra downstream rebase 1.3.19

Tegra186: mce: remove unused type conversions

This patch removes unused type conversions as all the relevant macros
now use U()/ULL(), making these explicit typecasts unnecessary.

Change-Id: I01fb5

Tegra186: mce: remove unused type conversions

This patch removes unused type conversions as all the relevant macros
now use U()/ULL(), making these explicit typecasts unnecessary.

Change-Id: I01fb534649db2aaf186406b1aef6897662b44fe3
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

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Tegra186: mce: fix trivial MISRA defects

This patch fixes MISRA defects for the MCE driver.

* Using logical NOT for bool type function
* Using MPIDR_AFFLVL_MASK << MPIDR_AFFINITY_BITS replace
MPI

Tegra186: mce: fix trivial MISRA defects

This patch fixes MISRA defects for the MCE driver.

* Using logical NOT for bool type function
* Using MPIDR_AFFLVL_MASK << MPIDR_AFFINITY_BITS replace
MPIDR_CLUSTER_MASK

Change-Id: I97e96f172a3c1158646a15a184c273c53a103d63
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>

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Merge pull request #1726 from antonio-nino-diaz-arm/an/includes

Sanitise includes across codebase

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- inclu

Sanitise includes across codebase

Enforce full include path for includes. Deprecate old paths.

The following folders inside include/lib have been left unchanged:

- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}

The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).

For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").

This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.

Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.

Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1528 from antonio-nino-diaz-arm/an/libc

libc: Cleanup library

libc: Fix all includes in codebase

The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.

Change-Id: I530f71d9510cb03

libc: Fix all includes in codebase

The codebase was using non-standard headers. It is needed to replace
them by the correct ones so that we can use the new libc headers.

Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1106 from antonio-nino-diaz-arm/an/bit-macro

Fix type of `unsigned long` constants

Fix type of `unsigned long` constants

The type `unsigned long` is 32 bit wide in AArch32, but 64 bit wide in
AArch64. This is inconsistent and that's why we avoid using it as per
the Coding Guidelin

Fix type of `unsigned long` constants

The type `unsigned long` is 32 bit wide in AArch32, but 64 bit wide in
AArch64. This is inconsistent and that's why we avoid using it as per
the Coding Guidelines. This patch changes all `UL` occurrences to `U`
or `ULL` depending on the context so that the size of the constant is
clear.

This problem affected the macro `BIT(nr)`. As long as this macro is used
to fill fields of registers, that's not a problem, since all registers
are 32 bit wide in AArch32 and 64 bit wide in AArch64. However, if the
macro is used to fill the fields of a 64-bit integer, it won't be able
to set the upper 32 bits in AArch32.

By changing the type of this macro to `unsigned long long` the behaviour
is always the same regardless of the architecture, as this type is
64-bit wide in both cases.

Some Tegra platform files have been modified by this patch.

Change-Id: I918264c03e7d691a931f0d1018df25a2796cc221
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1029 from islmit01/im/fix_includes

Fix order of includes

Fix order of remaining platform #includes

This fix modifies the order of system includes to meet the ARM TF coding
standard. There are some exceptions to this change in order to retain
header groupi

Fix order of remaining platform #includes

This fix modifies the order of system includes to meet the ARM TF coding
standard. There are some exceptions to this change in order to retain
header groupings and where there are headers within #if statements.

Change-Id: Ib5b668c992d817cc860e97b29e16ef106d17e404
Signed-off-by: Isla Mitchell <isla.mitchell@arm.com>

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Merge pull request #953 from vwadekar/tegra-misra-fixes-v1

Tegra misra fixes v1

Tegra186: mce: fix MISRA defects

Main fixes:

* Added explicit casts (e.g. 0U) to integers in order for them to be
compatible with whatever operation they're used in [Rule 10.1]
* Force operands o

Tegra186: mce: fix MISRA defects

Main fixes:

* Added explicit casts (e.g. 0U) to integers in order for them to be
compatible with whatever operation they're used in [Rule 10.1]
* Force operands of an operator to the same type category [Rule 10.4]
* Added curly braces ({}) around if/while statements in order to
make them compound [Rule 15.6]
* Added parentheses [Rule 12.1]
* Voided non C-library functions whose return types are not used [Rule 17.7]

Change-Id: I91404edec2e2194b1ce2672d2a3fc6a1f5bf41f1
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Tegra: enable 'signed-comparison' compilation warning/errors

This patch enables the 'sign-compare' flag, to enable warning/errors
for comparisons between signed/unsigned variables. The warning has
b

Tegra: enable 'signed-comparison' compilation warning/errors

This patch enables the 'sign-compare' flag, to enable warning/errors
for comparisons between signed/unsigned variables. The warning has
been enabled for all the Tegra platforms, to start with.

Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

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Merge pull request #913 from vwadekar/tegra-fixes-from-downstream

Tegra fixes from downstream

Tegra186: mce: max retries for ARI requests

This patch adds max retries for all ARI requests and asserts
if the ARI request is still busy.

Change-Id: I454ad9b557bb59e513e4c0c6f071275c87d0e07a
Signe

Tegra186: mce: max retries for ARI requests

This patch adds max retries for all ARI requests and asserts
if the ARI request is still busy.

Change-Id: I454ad9b557bb59e513e4c0c6f071275c87d0e07a
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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