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/rk3399_rockchip-uboot/drivers/mmc/
H A Dsh_sdhi.c174 u32 clkdiv, i, timeout; in sh_sdhi_clock_control() local
188 i = CONFIG_SH_SDHI_FREQ >> (0x8 + 1); in sh_sdhi_clock_control()
189 for (; clkdiv && clk >= (i << 1); (clkdiv >>= 1)) in sh_sdhi_clock_control()
190 i <<= 1; in sh_sdhi_clock_control()
273 unsigned short blocksize, i; in sh_sdhi_single_read() local
297 for (i = 0; i < blocksize / 8; i++) in sh_sdhi_single_read()
300 for (i = 0; i < blocksize / 2; i++) in sh_sdhi_single_read()
314 unsigned short blocksize, i, sec; in sh_sdhi_multi_read() local
340 for (i = 0; i < blocksize / 8; i++) in sh_sdhi_multi_read()
343 for (i = 0; i < blocksize / 2; i++) in sh_sdhi_multi_read()
[all …]
H A Drockchip_dw_mmc.c140 #define TUNING_ITERATION_TO_PHASE(i, num_phases) (DIV_ROUND_UP((i) * 360, num_phases)) argument
260 int i, num_phases = NUM_PHASES; in rockchip_dwmmc_execute_tuning() local
278 for (i = 0; i < num_phases; ) { in rockchip_dwmmc_execute_tuning()
280 if (TUNING_ITERATION_TO_PHASE(i, num_phases) > 270) in rockchip_dwmmc_execute_tuning()
283 rockchip_mmc_set_phase(host, true, TUNING_ITERATION_TO_PHASE(i, num_phases)); in rockchip_dwmmc_execute_tuning()
285 clk_set_phase(&priv->sample_clk, TUNING_ITERATION_TO_PHASE(i, num_phases)); in rockchip_dwmmc_execute_tuning()
288 debug("3 Tuning phase is %d v = %x\n", TUNING_ITERATION_TO_PHASE(i, num_phases), v); in rockchip_dwmmc_execute_tuning()
289 if (i == 0) in rockchip_dwmmc_execute_tuning()
294 ranges[range_count - 1].start = i; in rockchip_dwmmc_execute_tuning()
298 ranges[range_count - 1].end = i; in rockchip_dwmmc_execute_tuning()
[all …]
/rk3399_rockchip-uboot/cmd/ddr_tool/ddr_dq_eye/
H A Dddr_dq_eye.c81 int i; in print_title_bar() local
84 for (i = print_border->far_left; i < print_border->far_right; in print_title_bar()
85 i += PRINT_STEP * 4) in print_title_bar()
86 printf("%-4d", i); in print_title_bar()
100 int i; in print_ddr_dq_eye() local
115 for (i = print_border->far_left; in print_ddr_dq_eye()
116 i <= print_border->far_right; i += PRINT_STEP) { in print_ddr_dq_eye()
117 if (i / PRINT_STEP == sample / PRINT_STEP) in print_ddr_dq_eye()
119 else if (i / PRINT_STEP >= min / PRINT_STEP && in print_ddr_dq_eye()
120 i / PRINT_STEP <= max / PRINT_STEP) in print_ddr_dq_eye()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-sunxi/
H A Ddram_sunxi_dw.c32 int i, j; in mctl_set_bit_delays() local
36 for (i = 0; i < NR_OF_BYTE_LANES; i++) in mctl_set_bit_delays()
38 writel(DXBDLR_WRITE_DELAY(para->dx_write_delays[i][j]) | in mctl_set_bit_delays()
39 DXBDLR_READ_DELAY(para->dx_read_delays[i][j]), in mctl_set_bit_delays()
40 &mctl_ctl->dx[i].bdlr[j]); in mctl_set_bit_delays()
42 for (i = 0; i < 31; i++) in mctl_set_bit_delays()
43 writel(ACBDLR_WRITE_DELAY(para->ac_delays[i]), in mctl_set_bit_delays()
44 &mctl_ctl->acbdlr[i]); in mctl_set_bit_delays()
48 for (i = 0; i < 4; i++) in mctl_set_bit_delays()
49 writel(0x6 << 24, &mctl_ctl->dx[i].sdlr); in mctl_set_bit_delays()
[all …]
/rk3399_rockchip-uboot/drivers/pci/
H A Dpci_ftpci100.c34 unsigned int i, tmp32, bar_no, iovsmem = 1; in setup_pci_bar() local
51 for (i = 0; i < bar_no; i++) { in setup_pci_bar()
53 PCI_BASE_ADDRESS_0 + i * 4, 0xffffffff); in setup_pci_bar()
55 PCI_BASE_ADDRESS_0 + i * 4, &tmp32); in setup_pci_bar()
69 devs[priv->ndevs].bar[i].addr = priv->io_base; in setup_pci_bar()
70 devs[priv->ndevs].bar[i].size = size_mask + 1; in setup_pci_bar()
73 PCI_BASE_ADDRESS_0 + i * 4, in setup_pci_bar()
102 PCI_BASE_ADDRESS_0 + i * 4, alloc_base); in setup_pci_bar()
109 devs[priv->ndevs].bar[i].addr = alloc_base; in setup_pci_bar()
110 devs[priv->ndevs].bar[i].size = size_mask + 1; in setup_pci_bar()
[all …]
/rk3399_rockchip-uboot/board/bluewater/gurnard/
H A Dgurnard.c188 int i; in fpga_hw_init() local
197 for (i = 15; i <= 31; i++) /* EBINWAIT & EBID16 - 31 */ in fpga_hw_init()
198 at91_set_a_periph(2, i, 0); in fpga_hw_init()
257 unsigned i, tmp; in at91sam9g45_slowclock_init() local
265 for (i = 0; i < 1200; i++) in at91sam9g45_slowclock_init()
365 int i; in board_late_init() local
375 for (i = 0; i < 6; i++) { in board_late_init()
376 env_enetaddr[i] = env_str ? in board_late_init()
/rk3399_rockchip-uboot/arch/arm/mach-socfpga/
H A Dfpga_manager.c64 unsigned long i; in fpgamgr_poll_fpga_ready() local
67 for (i = 0; i < FPGA_TIMEOUT_CNT; i++) { in fpgamgr_poll_fpga_ready()
/rk3399_rockchip-uboot/common/
H A Dbedbug.c82 int i; in disppc() local
137 for (i = 0; i < num_instr; ++i, memaddr += 4, ctx.virtual += 4) { in disppc()
377 int i; in get_operand_value() local
387 for (i = 0; op->fields[i] != 0; ++i) { in get_operand_value()
388 if (op->fields[i] != field) { in get_operand_value()
392 opr = &operands[op->fields[i] - 1]; in get_operand_value()
495 int i; in spr_name() local
504 for (i = 0; i < n_sprs; ++i) { in spr_name()
505 if (spr == spr_map[i].spr_val) in spr_name()
506 return spr_map[i].spr_name; in spr_name()
[all …]
/rk3399_rockchip-uboot/cmd/
H A Dethsw.c723 int i; in ethsw_define_functions() local
732 for (i = 0; i < ARRAY_SIZE(ethsw_cmd_def); i++) { in ethsw_define_functions()
737 if (ethsw_cmd_def[i].keyword_function) in ethsw_define_functions()
740 aux_p = (void *)cmd_func + ethsw_cmd_def[i].cmd_func_offset; in ethsw_define_functions()
743 ethsw_cmd_def[i].keyword_function = cmd_func_aux; in ethsw_define_functions()
905 int i; in cmd_keywords_opt_check() local
918 for (i = 0; i < ARRAY_SIZE(cmd_opt_def); i++) { in cmd_keywords_opt_check()
921 cmd_keyw_opt_p = &cmd_opt_def[i].cmd_keyword[keyw_opt_matched]; in cmd_keywords_opt_check()
959 int i; in cmd_keywords_check() local
968 for (i = 0; i < ARRAY_SIZE(ethsw_cmd_def); i++) { in cmd_keywords_check()
[all …]
/rk3399_rockchip-uboot/drivers/net/fm/
H A Deth.c44 int i = 0; in dtsec_configure_serdes() local
55 memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x14, value); in dtsec_configure_serdes()
59 memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x4, value); in dtsec_configure_serdes()
66 memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x13, 0x0007); in dtsec_configure_serdes()
67 memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x12, 0xa120); in dtsec_configure_serdes()
73 memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x13, 0x0003); in dtsec_configure_serdes()
74 memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0x12, 0x0d40); in dtsec_configure_serdes()
79 memac_mdio_write(&bus, i, MDIO_DEVAD_NONE, 0, value); in dtsec_configure_serdes()
81 if ((priv->enet_if == PHY_INTERFACE_MODE_QSGMII) && (i < 3)) { in dtsec_configure_serdes()
82 i++; in dtsec_configure_serdes()
[all …]
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/
H A Dfsl_upm.c133 int i; in upm_nand_write_buf() local
137 for (i = 0; i < len; i++) { in upm_nand_write_buf()
138 out_8(chip->IO_ADDR_W, buf[i]); in upm_nand_write_buf()
149 int i; in upm_nand_read_buf() local
152 for (i = 0; i < len; i++) in upm_nand_read_buf()
153 buf[i] = in_8(chip->IO_ADDR_R); in upm_nand_read_buf()
H A Dzynq_nand.c566 int i, eccsteps, eccsize = chip->ecc.size; in zynq_nand_write_page_hwecc() local
591 for (i = 0; i < chip->ecc.total; i++) in zynq_nand_write_page_hwecc()
592 chip->oob_poi[eccpos[i]] = ~(ecc_calc[i]); in zynq_nand_write_page_hwecc()
624 int i, eccsize = chip->ecc.size; in zynq_nand_write_page_swecc() local
632 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in zynq_nand_write_page_swecc()
633 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in zynq_nand_write_page_swecc()
635 for (i = 0; i < chip->ecc.total; i++) in zynq_nand_write_page_swecc()
636 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in zynq_nand_write_page_swecc()
657 int i, stat, eccsteps, eccsize = chip->ecc.size; in zynq_nand_read_page_hwecc() local
701 for (i = 0; i < chip->ecc.total; i++) in zynq_nand_read_page_hwecc()
[all …]
/rk3399_rockchip-uboot/lib/optee_clientApi/
H A Dtee_ufs_rpmb.c33 for (int i = 0; i < 8; i++) { in bedata_to_u64() local
34 temp = d[i]; in bedata_to_u64()
35 data += (temp << ((7 - i) * 8)); in bedata_to_u64()
94 for (int i = 0; i < rsp_nfrm; i++) in rpmb_data_req() local
95 memcpy(rsp_frm + i, rsp_packets + i, sizeof(struct rpmb_data_frame)); in rpmb_data_req()
/rk3399_rockchip-uboot/board/engicam/isiotmx6ul/
H A Disiotmx6ul.c179 int i, ret; in board_mmc_init() local
187 for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { in board_mmc_init()
188 switch (i) { in board_mmc_init()
192 usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK); in board_mmc_init()
197 usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); in board_mmc_init()
201 i + 1); in board_mmc_init()
205 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
207 printf("Warning: failed to initialize mmc dev %d\n", i); in board_mmc_init()
/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Drdc-sema.c141 int i, ret; in imx_rdc_setup_peripherals() local
143 for (i = 0; i < count; i++) { in imx_rdc_setup_peripherals()
173 int i, ret; in imx_rdc_setup_masters() local
175 for (i = 0; i < count; i++) { in imx_rdc_setup_masters()
/rk3399_rockchip-uboot/drivers/crypto/fsl/
H A Derror.c196 int i; in report_deco_status() local
203 for (i = 0; i < ARRAY_SIZE(desc_error_list); i++) in report_deco_status()
204 if (desc_error_list[i].value == err_id) in report_deco_status()
207 if (i != ARRAY_SIZE(desc_error_list) && desc_error_list[i].error_text) in report_deco_status()
208 err_str = desc_error_list[i].error_text; in report_deco_status()
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dpinmux-common.c161 int i, mux = -1; in pinmux_set_func() local
175 for (i = 0; i < 4; i++) { in pinmux_set_func()
176 if (tegra_soc_pingroups[pin].funcs[i] == func) { in pinmux_set_func()
177 mux = i; in pinmux_set_func()
466 int i; in pinmux_config_pingrp_table() local
468 for (i = 0; i < len; i++) in pinmux_config_pingrp_table()
469 pinmux_config_pingrp(&config[i]); in pinmux_config_pingrp_table()
695 int i; in pinmux_config_drvgrp_table() local
697 for (i = 0; i < len; i++) in pinmux_config_drvgrp_table()
698 pinmux_config_drvgrp(&config[i]); in pinmux_config_drvgrp_table()
[all …]
/rk3399_rockchip-uboot/net/
H A Deth_legacy.c321 int i; in ether_crc() local
326 for (i = 0; i < 8; i++) in ether_crc()
402 int i; in eth_save_packet() local
410 for (i = 0; i < length; i++) in eth_save_packet()
411 eth_rcv_bufs[eth_rcv_last].data[i] = p[i]; in eth_save_packet()
421 int i; in eth_receive() local
434 for (i = 0; i < length; i++) in eth_receive()
435 p[i] = eth_rcv_bufs[eth_rcv_current].data[i]; in eth_receive()
/rk3399_rockchip-uboot/board/freescale/ls1046ardb/
H A Deth.c19 int i; in board_eth_init() local
66 for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) in board_eth_init()
67 fm_info_set_mdio(i, dev); in board_eth_init()
/rk3399_rockchip-uboot/test/log/
H A Dlog_test.c15 int i; in log_run() local
18 for (i = LOGL_FIRST; i < LOGL_COUNT; i++) { in log_run()
19 log(cat, i, "log %d\n", i); in log_run()
20 _log(log_uc_cat(cat), i, file, 100 + i, "func", "_log %d\n", in log_run()
21 i); in log_run()
/rk3399_rockchip-uboot/arch/mips/mach-au1x00/
H A Dau1x00_eth.c138 int i; in au1x00_send() local
147 i=0; in au1x00_send()
149 if(i>MAX_WAIT){ in au1x00_send()
154 i++; in au1x00_send()
220 int i; in au1x00_init() local
235 for(i=0;i<NO_OF_FIFOS;i++){ in au1x00_init()
236 fifo_tx[i].len = 0; in au1x00_init()
237 fifo_tx[i].addr = virt_to_phys(&txbuf[0]); in au1x00_init()
238 fifo_rx[i].addr = (virt_to_phys(net_rx_packets[i])) | in au1x00_init()
/rk3399_rockchip-uboot/drivers/video/drm/
H A Dpanel-rohm-bu18rl82.c158 int i; in csot_mg1561b01_prepare() local
160 for (i = 0; i < ARRAY_SIZE(regs); i++) in csot_mg1561b01_prepare()
161 rohm_deserializer_write(rl82, regs[i].reg, regs[i].def); in csot_mg1561b01_prepare()
246 int i; in touch_china_v123awf3_r1_prepare() local
248 for (i = 0; i < ARRAY_SIZE(regs); i++) in touch_china_v123awf3_r1_prepare()
249 rohm_deserializer_write(rl82, regs[i].reg, regs[i].def); in touch_china_v123awf3_r1_prepare()
/rk3399_rockchip-uboot/drivers/mtd/onenand/
H A Donenand_base.c295 int i; in flexonenand_region() local
297 for (i = 0; i < mtd->numeraseregions; i++) in flexonenand_region()
298 if (addr < mtd->eraseregions[i].offset) in flexonenand_region()
300 return i - 1; in flexonenand_region()
442 int ecc, i; in onenand_read_ecc() local
447 for (i = 0; i < 4; i++) { in onenand_read_ecc()
449 + ((ONENAND_REG_ECC_STATUS + i) << 1)); in onenand_read_ecc()
644 unsigned int i; in onenand_check_bufferram() local
652 i = ONENAND_CURRENT_BUFFERRAM(this); in onenand_check_bufferram()
653 if (this->bufferram[i].blockpage == blockpage) in onenand_check_bufferram()
[all …]
/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk_edp.c222 int i, try_times; in rk_edp_dpcd_transfer() local
248 for (i = 0; i < len; i++) in rk_edp_dpcd_transfer()
249 writel(*data++, &regs->buf_data[i]); in rk_edp_dpcd_transfer()
269 for (i = 0; i < len; i++) in rk_edp_dpcd_transfer()
270 *data++ = (u8)readl(&regs->buf_data[i]); in rk_edp_dpcd_transfer()
338 int i; in rk_edp_set_link_training() local
340 for (i = 0; i < edp->link_train.lane_count; i++) in rk_edp_set_link_training()
341 writel(training_values[i], &edp->regs->ln_link_trn_ctl[i]); in rk_edp_set_link_training()
358 int i = DPCD_LANE0_1_STATUS + (lane >> 1); in edp_get_lane_status() local
360 u8 l = edp_link_status(link_status, i); in edp_get_lane_status()
[all …]
/rk3399_rockchip-uboot/drivers/nvme/
H A Dnvme_show.c67 int i; in print_formats() local
71 for (i = 0; i < id->nlbaf; i++) { in print_formats()
72 printf("\tLBA Foramt %d Support: ", i); in print_formats()
73 if (i == ns->flbas) in print_formats()
77 print_format(id->lbaf + i); in print_formats()

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