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/rk3399_rockchip-uboot/drivers/sound/
H A Dmax98095.c120 int i; in rate_value() local
122 for (i = 1; i < ARRAY_SIZE(rate_table); i++) { in rate_value()
123 if (rate_table[i] >= rate) { in rate_value()
124 *value = i; in rate_value()
351 int i, ret; in max98095_reset() local
373 for (i = M98095_010_HOST_INT_CFG; i < M98095_REG_MAX_CACHED; i++) { in max98095_reset()
374 ret = max98095_i2c_write(i, 0); in max98095_reset()
H A Drockchip-i2s.c48 int i = 0; in dump_regs() local
50 for (i = 0; i <= I2S_RXDR; i += 4) in dump_regs()
51 debug("0x%02x: 0x%08x\n", i, readl(dev->regbase + i)); in dump_regs()
/rk3399_rockchip-uboot/drivers/core/
H A Dof_addr.c111 int i; in of_match_bus() local
113 for (i = 0; i < ARRAY_SIZE(of_busses); i++) in of_match_bus()
114 if (!of_busses[i].match || of_busses[i].match(np)) in of_match_bus()
115 return &of_busses[i]; in of_match_bus()
132 int onesize, i, na, ns; in of_get_address() local
152 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) in of_get_address()
153 if (i == index) { in of_get_address()
/rk3399_rockchip-uboot/drivers/gpio/
H A Dtegra_gpio.c205 int i; in gpio_config_table() local
207 for (i = 0; i < len; i++) { in gpio_config_table()
208 switch (config[i].init) { in gpio_config_table()
210 set_direction(config[i].gpio, DIRECTION_INPUT); in gpio_config_table()
213 set_level(config[i].gpio, 0); in gpio_config_table()
214 set_direction(config[i].gpio, DIRECTION_OUTPUT); in gpio_config_table()
217 set_level(config[i].gpio, 1); in gpio_config_table()
218 set_direction(config[i].gpio, DIRECTION_OUTPUT); in gpio_config_table()
221 set_config(config[i].gpio, CONFIG_GPIO); in gpio_config_table()
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-max96755f.c340 int i, ret; in max96755f_pinmux_set() local
342 for (i = 0; i < grp->num_configs; i++) { in max96755f_pinmux_set()
343 const struct config_desc *config = &grp->configs[i]; in max96755f_pinmux_set()
351 for (i = 0; i < grp->num_pins; i++) { in max96755f_pinmux_set()
352 ret = dm_i2c_reg_clrset(dev->parent, GPIO_A_REG(grp->pins[i]), in max96755f_pinmux_set()
361 ret = dm_i2c_reg_clrset(dev->parent, GPIO_B_REG(grp->pins[i]), in max96755f_pinmux_set()
370 GPIO_C_REG(grp->pins[i]), in max96755f_pinmux_set()
/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dddr3_init.c482 u32 chip_board_rev, i; in ddr3_get_static_ddr_mode() local
498 for (i = 0; i < size; i++) { in ddr3_get_static_ddr_mode()
499 if ((ddr3_get_cpu_freq() == ddr_modes[i].cpu_freq) && in ddr3_get_static_ddr_mode()
500 (ddr3_get_fab_opt() == ddr_modes[i].fab_freq) && in ddr3_get_static_ddr_mode()
501 (chip_board_rev == ddr_modes[i].chip_board_rev)) in ddr3_get_static_ddr_mode()
502 return i; in ddr3_get_static_ddr_mode()
562 u32 reg, i = 0; in ddr3_new_tip_dlb_config() local
566 while (config_table_ptr[i].reg_addr != 0) { in ddr3_new_tip_dlb_config()
567 reg_write(config_table_ptr[i].reg_addr, in ddr3_new_tip_dlb_config()
568 config_table_ptr[i].reg_data); in ddr3_new_tip_dlb_config()
[all …]
/rk3399_rockchip-uboot/drivers/power/charge/
H A Dsgm41542_charger.c443 int i = 0; in sgm41542_charger_status() local
449 if (i < 3) { in sgm41542_charger_status()
450 i++; in sgm41542_charger_status()
469 for (i = SGM4154x_CHRG_CTRL_0; i < SGM4154x_CHRG_CTRL_f; i++) { in sgm41542_charger_status()
470 sgm41542_read(charger, i, &value); in sgm41542_charger_status()
471 SGM_DBG("[%d]: 0x%x\n", i, value); in sgm41542_charger_status()
524 int i; in sgm41542_probe() local
528 for (i = SGM4154x_CHRG_CTRL_0; i < SGM4154x_CHRG_CTRL_f; i++) { in sgm41542_probe()
529 sgm41542_read(charger, i, &value); in sgm41542_probe()
530 SGM_DBG("gm41542: [%d]: 0x%x\n", i, value); in sgm41542_probe()
H A Dcps5601x_charger.c441 int i = 0; in cps5601x_charger_status() local
447 if (i < 3) { in cps5601x_charger_status()
448 i++; in cps5601x_charger_status()
464 for (i = CPS5601X_REG_00; i < CPS5601X_REG_1B; i++) { in cps5601x_charger_status()
465 cps5601x_read(charger, i, &value); in cps5601x_charger_status()
466 CPS_DBG("[%d]: 0x%x\n", i, value); in cps5601x_charger_status()
519 int i; in cps5601x_probe() local
523 for (i = CPS5601X_REG_00; i < CPS5601X_REG_1B; i++) { in cps5601x_probe()
524 cps5601x_read(charger, i, &value); in cps5601x_probe()
525 CPS_DBG("cps5601x: [%d]: 0x%x\n", i, value); in cps5601x_probe()
/rk3399_rockchip-uboot/drivers/dfu/
H A Ddfu.c47 int i = 0; in dfu_find_alt_num() local
51 i++; in dfu_find_alt_num()
53 return ++i; in dfu_find_alt_num()
446 int i, ret; in dfu_config_entities() local
463 for (i = 0; i < dfu_alt_num; i++) { in dfu_config_entities()
466 ret = dfu_fill_entity(&dfu[i], s, alt_num_cnt, interface, in dfu_config_entities()
473 list_add_tail(&dfu[i].list, &dfu_list); in dfu_config_entities()
563 int i, ret = 0; in dfu_write_from_mem_addr() local
575 for (i = 0; left > 0; i++) { in dfu_write_from_mem_addr()
580 ret = dfu_write(dfu, dp, write, i); in dfu_write_from_mem_addr()
[all …]
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/
H A Dfsmc_nand.c199 u32 num_err, i; in fsmc_bch8_correct_data() local
248 i = 0; in fsmc_bch8_correct_data()
249 while (i < num_err) { in fsmc_bch8_correct_data()
250 err_idx[i] ^= 3; in fsmc_bch8_correct_data()
252 if (err_idx[i] < 512 * 8) in fsmc_bch8_correct_data()
253 __change_bit(err_idx[i], dat); in fsmc_bch8_correct_data()
255 i++; in fsmc_bch8_correct_data()
341 int i, j, s, stat, eccsize = chip->ecc.size; in fsmc_read_page_hwecc() local
356 for (i = 0, s = 0; s < eccsteps; s++, i += eccbytes, p += eccsize) { in fsmc_read_page_hwecc()
379 memcpy(&ecc_code[i], oob, 13); in fsmc_read_page_hwecc()
[all …]
H A Dnand_util.c447 ssize_t i; in drop_ffs() local
449 for (i = l - 1; i >= 0; i--) in drop_ffs()
450 if (buf[i] != 0xFF) in drop_ffs()
454 l = i + 1; in drop_ffs()
792 int i; in check_pattern() local
794 for (i = 0; i < size; i++) in check_pattern()
795 if (buf[i] != patt) in check_pattern()
820 int err, ret = -1, i, patt_count; in nand_torture() local
841 for (i = 0; i < patt_count; i++) { in nand_torture()
866 memset(buf, patterns[i], mtd->erasesize); in nand_torture()
[all …]
/rk3399_rockchip-uboot/common/
H A Dimage-fdt.c87 int i = 0; in boot_mem_rsv_regions() local
120 i++; in boot_mem_rsv_regions()
125 if (i == 1) in boot_mem_rsv_regions()
147 int i, total; in boot_fdt_add_mem_rsv_regions() local
157 for (i = 0; i < total; i++) { in boot_fdt_add_mem_rsv_regions()
158 if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0) in boot_fdt_add_mem_rsv_regions()
178 int i, total; in boot_fdt_add_sysmem_rsv_regions() local
194 for (i = 0; i < total; i++) { in boot_fdt_add_sysmem_rsv_regions()
195 if (fdt_get_mem_rsv(fdt_blob, i, &addr, &size) != 0) in boot_fdt_add_sysmem_rsv_regions()
199 sprintf(resvname, "fdt-memory-reserved%d", i); in boot_fdt_add_sysmem_rsv_regions()
H A Dimage-android-dt.c107 u32 i; in android_dt_print_contents() local
128 for (i = 0; i < entry_count; ++i) { in android_dt_print_contents()
129 const ulong e_addr = hdr_addr + entries_offset + i * entry_size; in android_dt_print_contents()
139 printf("dt_table_entry[%d]:\n", i); in android_dt_print_contents()
/rk3399_rockchip-uboot/drivers/net/
H A Dat91_emac.c187 int i; in at91emac_phy_reset() local
200 for (i = 0; i < 30000; i++) { in at91emac_phy_reset()
223 int i; in at91emac_phy_init() local
244 for (i = 0; i < 100000 / 100; i++) { in at91emac_phy_init()
319 int i; in at91emac_init() local
354 for (i = 0; i < RBF_FRAMEMAX; i++) { in at91emac_init()
355 dev->rbfdt[i].addr = (unsigned long) net_rx_packets[i]; in at91emac_init()
356 dev->rbfdt[i].size = 0; in at91emac_init()
H A Dmvgbe.c245 int i; in set_dram_access() local
247 for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { in set_dram_access()
249 win_param.win = i; /* Use Ethernet window i */ in set_dram_access()
256 win_param.base_addr = gd->bd->bi_dram[i].start; in set_dram_access()
257 win_param.size = gd->bd->bi_dram[i].size; in set_dram_access()
264 switch (i) { in set_dram_access()
386 int i; in mvgbe_init_rx_desc_ring() local
390 for (i = 0; i < RINGSZ; i++) { in mvgbe_init_rx_desc_ring()
395 p_rx_desc->buf_ptr = dmvgbe->p_rxbuf + i * PKTSIZE_ALIGN; in mvgbe_init_rx_desc_ring()
396 if (i == (RINGSZ - 1)) in mvgbe_init_rx_desc_ring()
[all …]
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.c898 int i, j; in brcmnand_create_layout() local
918 for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) { in brcmnand_create_layout()
920 if (i == 0) { in brcmnand_create_layout()
921 layout->oobfree[idx2].offset = i * sas + 1; in brcmnand_create_layout()
927 layout->oobfree[idx2].offset = i * sas; in brcmnand_create_layout()
931 layout->eccpos[idx1++] = i * sas + 6; in brcmnand_create_layout()
932 layout->eccpos[idx1++] = i * sas + 7; in brcmnand_create_layout()
933 layout->eccpos[idx1++] = i * sas + 8; in brcmnand_create_layout()
934 layout->oobfree[idx2].offset = i * sas + 9; in brcmnand_create_layout()
961 for (i = 0, idx1 = 0, idx2 = 0; i < sectors; i++) { in brcmnand_create_layout()
[all …]
/rk3399_rockchip-uboot/board/freescale/mx6ul_14x14_evk/
H A Dmx6ul_14x14_evk.c122 int i; in iox74lv_init() local
126 for (i = 7; i >= 0; i--) { in iox74lv_init()
128 gpio_direction_output(IOX_SDI, seq[qn_output[i]][0]); in iox74lv_init()
141 for (i = 7; i >= 0; i--) { in iox74lv_init()
143 gpio_direction_output(IOX_SDI, seq[qn_output[i]][1]); in iox74lv_init()
384 int i, ret; in board_mmc_init()
392 for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { in board_mmc_init()
393 switch (i) { in board_mmc_init()
418 …printf("Warning: you configured more USDHC controllers (%d) than supported by the board\n", i + 1); in board_mmc_init()
422 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]); in board_mmc_init()
[all …]
/rk3399_rockchip-uboot/
H A Dmake.sh584 for ((i=0; i<5; i++))
586 INIT_BIN="init${i}.bin"
587 INIT_IDX="INIT${i}"
597 INIT_ARG=${INIT_ARG}" -i${i} ${OFFS}"
602 for ((i=0; i<5; i++))
604 MCU_BIN="mcu${i}.bin"
605 MCU_IDX="MCU${i}"
609 if [ ${i} -eq 0 ]; then
625 MCU_ARG=${MCU_ARG}" -m${i} ${OFFS}"
630 for ((i=0; i<5; i++))
[all …]
/rk3399_rockchip-uboot/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c29 uint8_t i; in get_PLLCLK() local
35 for (i = 0; i < ((clkset >> SYSCON_CLKSET_PLL_PS_SHIFT) & 3); i++) in get_PLLCLK()
/rk3399_rockchip-uboot/board/logicpd/imx6/
H A DREADME1 U-Boot for LogicPD i.MX6 Development Kit
6 Logic PD has an i.MX6 System On Module (SOM) and a correspondong development
10 On the intial release, the SOM came with either an i.MX6D or i.MX6Q.
12 For more details about Logic PD i.MX6 Development kit, visit:
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dap.c156 int i; in init_pmc_scratch() local
159 for (i = 0; i < 23; i++) in init_pmc_scratch()
160 writel(0, &pmc->pmc_scratch1+i); in init_pmc_scratch()
/rk3399_rockchip-uboot/drivers/net/fsl-mc/
H A Dmc.c51 int i; in dump_ram_words() local
55 for (i = 0; i < 16; i++) in dump_ram_words()
56 printf("%#x ", words[i]); in dump_ram_words()
170 int err = 0, len = 0, size, i; in mc_fixup_mac_addr() local
178 for (i = 0; i < ARP_HLEN; i++) in mc_fixup_mac_addr()
179 enetaddr_32[i] = cpu_to_fdt32(eth_dev->enetaddr[i]); in mc_fixup_mac_addr()
325 int i, err = 0, ret = 0; in mc_fixup_mac_addrs() local
329 for (i = WRIOP1_DPMAC1; i < NUM_WRIOP_PORTS; i++) { in mc_fixup_mac_addrs()
331 if ((wriop_is_enabled_dpmac(i) != 1) || in mc_fixup_mac_addrs()
332 (wriop_get_phy_address(i) == -1)) in mc_fixup_mac_addrs()
[all …]
/rk3399_rockchip-uboot/drivers/ata/
H A Ddwc_ahsata.c92 int i; in waiting_for_cmd_completed() local
95 for (i = 0; in waiting_for_cmd_completed()
96 ((status = readl(offset)) & sign) && i < timeout_msec; in waiting_for_cmd_completed()
97 ++i) in waiting_for_cmd_completed()
100 return (i < timeout_msec) ? 0 : -1; in waiting_for_cmd_completed()
116 int i, j, timeout = 1000; in ahci_host_init() local
162 for (i = 0; i < uc_priv->n_ports; i++) { in ahci_host_init()
163 uc_priv->port[i].port_mmio = ahci_port_base(host_mmio, i); in ahci_host_init()
164 port_mmio = uc_priv->port[i].port_mmio; in ahci_host_init()
249 writel(1 << i, &host_mmio->is); in ahci_host_init()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A DKconfig8 bool "i.MX Resource domain controller driver"
11 i.MX Resource domain controller is used to assign masters
25 i.MX6/7 supports DCD and Plugin. Enable this configuration
29 bool "Support i.MX HAB features"
49 supports i.MX53 and i.MX6.
/rk3399_rockchip-uboot/drivers/clk/at91/
H A Dclk-generated.c86 u8 i; in generic_clk_set_rate() local
90 for (i = 0; i < priv->num_parents; i++) { in generic_clk_set_rate()
91 ret = clk_get_by_index(dev_get_parent(clk->dev), i, &parent); in generic_clk_set_rate()
111 best_parent_id = i; in generic_clk_set_rate()

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