Home
last modified time | relevance | path

Searched hist:ff4735cfdfde273866a7e079dedec27b1e11438e (Results 1 – 12 of 12) sorted by relevance

/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/m0/src/
H A Dstartup.cff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
H A Dsuspend.cff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
H A Ddram.cff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
/rk3399_ARM-atf/plat/rockchip/rk3399/include/shared/
H A Dm0_param.hff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/
H A Dm0_ctl.hff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
H A Dm0_ctl.cff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
H A Dpmu.cff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/m0/include/
H A Drk3399_mcu.hff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
/rk3399_ARM-atf/plat/rockchip/rk3399/include/
H A Dplat.ld.Sff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/dram/
H A Ddfs.cff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/m0/
H A DMakefileff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>
/rk3399_ARM-atf/plat/rockchip/rk3399/
H A Dplatform.mkff4735cfdfde273866a7e079dedec27b1e11438e Fri Apr 20 07:55:21 UTC 2018 Lin Huang <hl@rock-chips.com> rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>