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9d068f66 |
| 08-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
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c3cf06f1 |
| 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver - dt-bindings folders - zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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a54616a6 |
| 17-May-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1384 from rockchip-linux/for_m0_patch
for rk3399 suspend/resume
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ff4735cf |
| 20-Apr-2018 |
Lin Huang <hl@rock-chips.com> |
rockchip/rk3399: Split M0 binary into two
All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST when SOC enter into FSM, and SRAM will shutdown during this time, so this code need ru
rockchip/rk3399: Split M0 binary into two
All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST when SOC enter into FSM, and SRAM will shutdown during this time, so this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram part still run in SRAM, and suspend part run in PMUSRAM.
Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1 Signed-off-by: Lin Huang <hl@rock-chips.com>
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f132b4a0 |
| 04-May-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #925 from dp-arm/dp/spdx
Use SPDX license identifiers
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82cb2c1a |
| 03-May-2017 |
dp-arm <dimitris.papastamos@arm.com> |
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by
Use SPDX license identifiers
To make software license auditing simpler, use SPDX[0] license identifiers instead of duplicating the license text in every file.
NOTE: Files that have been imported by FreeBSD have not been modified.
[0]: https://spdx.org/
Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
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d6845d3d |
| 27-Feb-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #835 from rockchip-linux/rk3399-atf-cleanup-20170210
RK3399 ARM TF clean up 20170210
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4dbab5d2 |
| 31-Jan-2017 |
Julius Werner <jwerner@chromium.org> |
rockchip: Add MIN() and MAX() macros back to M0 code
These macros were accidentally deleted in a previous cleanup. This slipped through because the code using them is currently unused, but that may
rockchip: Add MIN() and MAX() macros back to M0 code
These macros were accidentally deleted in a previous cleanup. This slipped through because the code using them is currently unused, but that may change in the future.
Signed-off-by: Julius Werner <jwerner@chromium.org>
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1830f790 |
| 24-Feb-2017 |
Xing Zheng <zhengxing@rock-chips.com> |
rockchip: Clean up header and referenced files
So far, there are more and more features are supported on the RK3399, meanwhile, these features are increasingly being defined and intertwined. It's ti
rockchip: Clean up header and referenced files
So far, there are more and more features are supported on the RK3399, meanwhile, these features are increasingly being defined and intertwined. It's time to clean up and make them clearer.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
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95c3f422 |
| 30-Nov-2016 |
Lin Huang <hl@rock-chips.com> |
rockchip: rk3399: add stopwatch functions to m0
There is system timer in m0, we can use it to implement a set of stopwatch functions for measuring timeouts.
Signed-off-by: Lin Huang <hl@rock-chips.
rockchip: rk3399: add stopwatch functions to m0
There is system timer in m0, we can use it to implement a set of stopwatch functions for measuring timeouts.
Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Derek Basehore <dbasehore@chromium.org>
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977001aa |
| 26-Oct-2016 |
Xing Zheng <zhengxing@rock-chips.com> |
rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf binary, it hard to maintain later, we have M0 compile flow in ATF, and M0 can als
rk3399: dram: use PMU M0 to do ddr frequency scaling
We used dcf do ddr frequency scaling, but we just include a dcf binary, it hard to maintain later, we have M0 compile flow in ATF, and M0 can also work for ddr frequency scaling, so let's use it.
Signed-off-by: Lin Huang <hl@rock-chips.com> Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
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a9a4d23a |
| 24-Oct-2016 |
Xing Zheng <zhengxing@rock-chips.com> |
rockchip: update the raw read/write APIs for M0
Since the ATF project, we usually use the mmio_read_32 and mmio_write_32. And the mmio_write_32, the firse parameter is ADDR, the second is VALUE. In
rockchip: update the raw read/write APIs for M0
Since the ATF project, we usually use the mmio_read_32 and mmio_write_32. And the mmio_write_32, the firse parameter is ADDR, the second is VALUE. In order to style consistency:
1/ rename readl/writel to mmio_read_32/mmio_write_32 2/ for keeping the same with mmio_write_32 in the ATF project, swap the order of the parameters for M0 mmio_write_32
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Lin Huang <hl@rock-chips.com>
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ad09652c |
| 26-Oct-2016 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #724 from rockchip-linux/support-rk3399-sdram
rockchip: optimize the link mechanism for SRAM code
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8382e17c |
| 12-Oct-2016 |
Caesar Wang <wxt@rock-chips.com> |
rockchip: add M0 source code and build system for RK3399
This CL supports add M0 source code to built into the bl31.bin, the goal is that we can load the M0 code binary into SRAM and execute it.
We
rockchip: add M0 source code and build system for RK3399
This CL supports add M0 source code to built into the bl31.bin, the goal is that we can load the M0 code binary into SRAM and execute it.
We need the M0 help us to clean the power_mode_en bit during the AP PMU enter the state machine with interrupt, and avoid to the AP can not exit the loop forever.
Change-Id: I844582c54a1f0d44ca41290d44618df58679f341 Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
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