Merge "rk3399: m0: Fix compiler warnings." into integration

rk3399: m0: Fix compiler warnings.

GCC complains for quite some versions, when compiling the M0 firmware
for Rockchip's rk3399 platform, about an invalid type of function 'main':

warning: return

rk3399: m0: Fix compiler warnings.

GCC complains for quite some versions, when compiling the M0 firmware
for Rockchip's rk3399 platform, about an invalid type of function 'main':

warning: return type of 'main' is not 'int' [-Wmain]

This patch addresses this, by renaming the function to 'm0_main'.

Signed-off-by: Christoph Müllner <christophm30@gmail.com>
Change-Id: I10887f2bda6bdb48c5017044c264139004f7c785

show more ...

Merge pull request #1384 from rockchip-linux/for_m0_patch

for rk3399 suspend/resume

rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need ru

rockchip/rk3399: Split M0 binary into two

All the m0 code run in SRAM before, but we need to watch PMU_POWER_ST
when SOC enter into FSM, and SRAM will shutdown during this time, so
this code need run in PMUSRAM. But PMUSRAM only 8K space, we can not
put all the m0 binary into PMUSRAM, Split the M0 binary into two, dram
part still run in SRAM, and suspend part run in PMUSRAM.

Change-Id: Ie08bdf3e2b8838f12b9297fe60ab0aad219684b1
Signed-off-by: Lin Huang <hl@rock-chips.com>

show more ...

Merge pull request #925 from dp-arm/dp/spdx

Use SPDX license identifiers

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by

Use SPDX license identifiers

To make software license auditing simpler, use SPDX[0] license
identifiers instead of duplicating the license text in every file.

NOTE: Files that have been imported by FreeBSD have not been modified.

[0]: https://spdx.org/

Change-Id: I80a00e1f641b8cc075ca5a95b10607ed9ed8761a
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>

show more ...

Merge pull request #835 from rockchip-linux/rk3399-atf-cleanup-20170210

RK3399 ARM TF clean up 20170210

rockchip: rk3399: Move DQS drive strength setting to M0

This moves the setting of the DQS drive strength to the M0 to minimize
the impact on DDR transactions. We need to have the DQS drive strength

rockchip: rk3399: Move DQS drive strength setting to M0

This moves the setting of the DQS drive strength to the M0 to minimize
the impact on DDR transactions. We need to have the DQS drive strength
changed for data training, which is triggered by the M0, but it also
needs to be changed back when data training is finished.

Signed-off-by: Derek Basehore <dbasehore@chromium.org>

show more ...

rockchip: Clean up header and referenced files

So far, there are more and more features are supported on the RK3399,
meanwhile, these features are increasingly being defined and intertwined.
It's ti

rockchip: Clean up header and referenced files

So far, there are more and more features are supported on the RK3399,
meanwhile, these features are increasingly being defined and intertwined.
It's time to clean up and make them clearer.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

show more ...

rockchip: rk3399: Don't wait for vblank in M0 for ddrfreq

This removes waiting for vblank on the M0 during ddrfreq transitions.
That will now be done in the kernel to allow scheduling to be done on

rockchip: rk3399: Don't wait for vblank in M0 for ddrfreq

This removes waiting for vblank on the M0 during ddrfreq transitions.
That will now be done in the kernel to allow scheduling to be done on
the CPU core that changes the ddr frequency. Waiting for vblank in
the M0 would have the CPU core that waits on the M0 spin looping for
up to 16ms (1 frame for the display).

Signed-off-by: Derek Basehore <dbasehore@chromium.org>

show more ...

rockchip: rk3399: restore PMU_CRU_GATEDIS_CON0 value after ddr dvfs

we will set PMU_CRU_GATEDIS_CON0 when idle port, it will enable
all clock, for save power consumption, we need to restore old valu

rockchip: rk3399: restore PMU_CRU_GATEDIS_CON0 value after ddr dvfs

we will set PMU_CRU_GATEDIS_CON0 when idle port, it will enable
all clock, for save power consumption, we need to restore old value
when finish it.

Signed-off-by: Lin Huang <hl@rock-chips.com>

show more ...

rockchip: rk3399: check vop status when we wait dma finish flag

When vop is disabled and we read the vop register the system will
hang, so check vop status when we wait for the DMA finish flag to
av

rockchip: rk3399: check vop status when we wait dma finish flag

When vop is disabled and we read the vop register the system will
hang, so check vop status when we wait for the DMA finish flag to
avoid this sitiuation. This is done by checking for standby, DMA stop
mode, and disabled window states. Any one of these will prevent the
DMA finish flag from triggering.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Derek Basehore <dbasehore@chromium.org>

show more ...

rk3399: dram: use PMU M0 to do ddr frequency scaling

We used dcf do ddr frequency scaling, but we just include a dcf
binary, it hard to maintain later, we have M0 compile flow in ATF,
and M0 can als

rk3399: dram: use PMU M0 to do ddr frequency scaling

We used dcf do ddr frequency scaling, but we just include a dcf
binary, it hard to maintain later, we have M0 compile flow in ATF,
and M0 can also work for ddr frequency scaling, so let's use it.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

show more ...