| /optee_os/core/arch/riscv/mm/ |
| H A D | tlb_helpers_rv.S | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/arch/arm/include/kernel/ |
| H A D | tlb_helpers.h | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/arch/arm/kernel/ |
| H A D | tlb_helpers_a64.S | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | cache_helpers_a64.S | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | tlb_helpers_a32.S | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/include/mm/ |
| H A D | core_mmu.h | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/mm/ |
| H A D | vm.c | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/arch/arm/include/ |
| H A D | arm64.h | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| /optee_os/core/arch/arm/mm/ |
| H A D | tee_pager.c | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|
| H A D | core_mmu.c | fe16b87b7300da622fa2961ccb6ce1eddfa8596f Thu Jun 08 16:51:40 UTC 2023 Alvin Chang <alvinga@andestech.com> core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
|