| #
9b0ee59d |
| 12-Jun-2024 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename tee_mm_vcore to core_virt_mem_pool
Rename tee_mm_vcore to core_virt_mem_pool to make it clear that it handles virtual memory allocations.
Signed-off-by: Jens Wiklander <jens.wiklander@
core: rename tee_mm_vcore to core_virt_mem_pool
Rename tee_mm_vcore to core_virt_mem_pool to make it clear that it handles virtual memory allocations.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
ae9b4197 |
| 22-May-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
core: pager: fix arguments passed to calloc in alloc_merged_pgt_array()
An error was reported when compiling with GCC14 on this calloc:
core/arch/arm/mm/tee_pager.c: In function 'alloc_merged_pgt_a
core: pager: fix arguments passed to calloc in alloc_merged_pgt_array()
An error was reported when compiling with GCC14 on this calloc:
core/arch/arm/mm/tee_pager.c: In function 'alloc_merged_pgt_array': core/arch/arm/mm/tee_pager.c:934:35: warning: 'calloc' sizes specified with 'sizeof' in the earlier argument and not in the later argument [-Wcalloc-transposed-args] 934 | pgt_array = calloc(sizeof(struct pgt *), pgt_count); | ^~~~~~
Looking at the code, it seems that pgt_count and sizeof(struct pgt *) are inverted.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Fixes: 60e367146042 ("core: pager fix alloc_merged_pgt_array()") Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
fe16b87b |
| 08-Jun-2023 |
Alvin Chang <alvinga@andestech.com> |
core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has FCSE extension. To support multiple architecture, it would be good to rename
core: mm: Rename "mva" to "va" for TLB operations
The terminology "mva" is specific for older ARM architecture which has FCSE extension. To support multiple architecture, it would be good to rename "mva" to common terminology, such as "va". This PR renames "mva" to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is reserved because it is really defined in ARM32's documentations.
Signed-off-by: Alvin Chang <alvinga@andestech.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
show more ...
|
| #
ee34e7ea |
| 11-Apr-2023 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove TEE_RAM_VA_START and TEE_TEXT_VA_START
TEE_RAM_VA_START and TEE_TEXT_VA_START are defined to exactly the same thing as TEE_RAM_START and TEE_LOAD_ADDR respectively. They don't deal with
core: remove TEE_RAM_VA_START and TEE_TEXT_VA_START
TEE_RAM_VA_START and TEE_TEXT_VA_START are defined to exactly the same thing as TEE_RAM_START and TEE_LOAD_ADDR respectively. They don't deal with virtual addresses as the names suggests, they too represent physical addresses. So remove TEE_RAM_VA_START and TEE_TEXT_VA_START to get rid of some redundancy.
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
show more ...
|
| #
e17e7a56 |
| 07-Jun-2022 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: move pgt_cache to struct user_mode_ctx
Moves pgt_cache from struct thread_specific_data to struct user_mode_ctx.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome F
core: move pgt_cache to struct user_mode_ctx
Moves pgt_cache from struct thread_specific_data to struct user_mode_ctx.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
8b427282 |
| 01-Mar-2022 |
Jelle Sels <jelle.sels@arm.com> |
core: change TEE_MATTR_CACHE_ to TEE_MATTR_MEM_TYPE_
Some extra memory types will be added. This patch renames all TEE_MATTR_CACHE_ defines to TEE_MATTR_MEM_TYPE_. This will make the next patches ea
core: change TEE_MATTR_CACHE_ to TEE_MATTR_MEM_TYPE_
Some extra memory types will be added. This patch renames all TEE_MATTR_CACHE_ defines to TEE_MATTR_MEM_TYPE_. This will make the next patches easier to understand.
Signed-off-by: Jelle Sels <jelle.sels@arm.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|
| #
c2e4eb43 |
| 23-May-2021 |
Anton Rybakov <a.rybakov@omp.ru> |
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because
core_mmu: fix phys_to_virt() to check length
phys_to_virt() function without length parameter doesn`t always have ability to find the correct mapping for requested physical address. This is because physical address can be mapped in the same time in different virtual regions with different length. So the first found region which contains the requested physical address possibly doesn`t have enough mapped data. This is fixed by adding the length parameter to phys_to_virt() function. Length parameter can be set to 1 if caller knows that requested (pa + len) doesn`t cross mapping granule boundary.
core_mmu_get_va() and io_pa_or_va() functions now are take length parameter too as they based on phys_to_virt() in case of MMU enabled.
Signed-off-by: Anton Rybakov <a.rybakov@omp.ru> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1-157C_DK2) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6dlsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6qpsabreauto) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6sllevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ullevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx6ulzevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7dsabresd) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx7ulpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mmevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mnevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mqevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8mpevk) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qmmek) Tested-by: Clement Faure <clement.faure@nxp.com> (imx-mx8qxpmek)
show more ...
|
| #
7b4c4c81 |
| 12-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: don't call free_region() from paged function
Call free_region() directly from tee_pager_rem_um_region() instead of the unpaged helper function rem_region(). This reduces the unpaged par
core: pager: don't call free_region() from paged function
Call free_region() directly from tee_pager_rem_um_region() instead of the unpaged helper function rem_region(). This reduces the unpaged part with a few bytes.
Reviewed-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
94b58775 |
| 21-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: fix split_region() to maintain order
Fixes split_region() to maintain the order of paged regions when a region is split into two.
Fixes: 4a3f6ad054d4 ("core: pager: let struct tee_page
core: pager: fix split_region() to maintain order
Fixes split_region() to maintain the order of paged regions when a region is split into two.
Fixes: 4a3f6ad054d4 ("core: pager: let struct tee_pager_area span multiple translation tables") Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey) Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1 w/ gp, stmm) Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
60e36714 |
| 21-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager fix alloc_merged_pgt_array()
Fix the logic for how a shared pgt is detected in alloc_merged_pgt_array(). Without this there's a buffer overrun in the pgt_array plus of course not quite
core: pager fix alloc_merged_pgt_array()
Fix the logic for how a shared pgt is detected in alloc_merged_pgt_array(). Without this there's a buffer overrun in the pgt_array plus of course not quite right pgt pointers in that array.
Fixes: 4a3f6ad054d4 ("core: pager: let struct tee_pager_area span multiple translation tables") Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
5e620504 |
| 21-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: fix split_region() pgt assignment
Fixes an error in how pgt_array is copied from the original paged region into the new split off region.
Fixes: 4a3f6ad054d4 ("core: pager: let struct
core: pager: fix split_region() pgt assignment
Fixes an error in how pgt_array is copied from the original paged region into the new split off region.
Fixes: 4a3f6ad054d4 ("core: pager: let struct tee_pager_area span multiple translation tables") Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
6b743a2d |
| 19-May-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: fix increment calculation in tee_pager_set_um_region_attr()
With the introduction of the commit referred below may a paged region span multiple translation tables, but tee_pager_set_um_
core: pager: fix increment calculation in tee_pager_set_um_region_attr()
With the introduction of the commit referred below may a paged region span multiple translation tables, but tee_pager_set_um_region_attr() wasn't updated to handle this. So fix this by accurately calculate the increment in the main loop of that function.
Fixes: 4a3f6ad054d4 ("core: pager: let struct tee_pager_area span multiple translation tables") Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
d5ad7ccf |
| 10-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: rename struct tee_pager_area to vm_paged_region
Renames struct tee_pager_area to struct vm_paged_region and moves it next to the declaration of struct vm_region. Since areas are now called pag
core: rename struct tee_pager_area to vm_paged_region
Renames struct tee_pager_area to struct vm_paged_region and moves it next to the declaration of struct vm_region. Since areas are now called paged regions or regions also rename functions, variables and struct members accordingly.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
4a3f6ad0 |
| 08-Feb-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: let struct tee_pager_area span multiple translation tables
Extends struct tee_pager_area to be able to span multiple translation tables avoiding the need to split ranges into multiple a
core: pager: let struct tee_pager_area span multiple translation tables
Extends struct tee_pager_area to be able to span multiple translation tables avoiding the need to split ranges into multiple areas in case a range crosses a translation table boundary.
Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960) Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Tested-by: Etienne Carriere <etienne.carriere@linaro.org> (stm32mp1) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
c2906418 |
| 09-Nov-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: initialize vabase in core pager tables
Initialize the vabase in each struct pgt used to page OP-TEE core.
Fixes: 5ca851ec83ba ("core: pager: add struct tblidx") Acked-by: Jerome Foriss
core: pager: initialize vabase in core pager tables
Initialize the vabase in each struct pgt used to page OP-TEE core.
Fixes: 5ca851ec83ba ("core: pager: add struct tblidx") Acked-by: Jerome Forissier <jerome@forissier.org> Tested-by: Jerome Forissier <jerome@forissier.org> (HiKey960) Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
5ca851ec |
| 09-Nov-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: add struct tblidx
Adds struct tblidx when referring to entries associated with an area (struct tee_pager_area). This should make a few table indexes a bit less ambiguous.
Reviewed-by:
core: pager: add struct tblidx
Adds struct tblidx when referring to entries associated with an area (struct tee_pager_area). This should make a few table indexes a bit less ambiguous.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
b757e307 |
| 19-Mar-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: introduce CFG_CORE_PAGE_TAG_AND_IV
Introduces CFG_CORE_PAGE_TAG_AND_IV which defaults to enabled if TA paging is enabled. Can be used to disable tag and IV paging for paged read-write pages.
core: introduce CFG_CORE_PAGE_TAG_AND_IV
Introduces CFG_CORE_PAGE_TAG_AND_IV which defaults to enabled if TA paging is enabled. Can be used to disable tag and IV paging for paged read-write pages.
Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
13616e88 |
| 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: support paging of tag and IV
Adds support for paging of the tag and IV protecting some read-write fobjs. The tag and IV needed to decrypt/encrypt a page are accessed by the pager. Since
core: pager: support paging of tag and IV
Adds support for paging of the tag and IV protecting some read-write fobjs. The tag and IV needed to decrypt/encrypt a page are accessed by the pager. Since the pager can't handle page fault caused by itself special measures are taken to make sure that the needed tag and IV are accessible when needed.
tee_pager_get_page() and tee_pager_load_page() are replaced by pager_get_page() which does what the previous functions used plus the additional logic to handle paging of tag and IV.
A new function tee_pager_init_iv_area() is added. It enables registration of a read/write paged fobj spanning the area used for storing all tags and IVs. This fobj must store its tags and IVs in unpaged memory, for instance the heap.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
afe47fe8 |
| 25-Jan-2021 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: pager: small simplifications
Adds pmem_clear() and make_dirty_page() as small helper functions to avoid some duplication of code.
Changes tee_pager_unhide_page() to take the virtual address o
core: pager: small simplifications
Adds pmem_clear() and make_dirty_page() as small helper functions to avoid some duplication of code.
Changes tee_pager_unhide_page() to take the virtual address of the page to unhide instead of an index into the translation table.
Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jerome Forissier <jerome@forissier.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
0d016aff |
| 12-Dec-2020 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: fix user mode context reference in pager
Fix tee_pager_gpt_save_and_release_entries() to use to_user_mode_ctx() to get current context user memory areas instead of to_user_ta_ctx() since the f
core: fix user mode context reference in pager
Fix tee_pager_gpt_save_and_release_entries() to use to_user_mode_ctx() to get current context user memory areas instead of to_user_ta_ctx() since the former supports both SP and TA contexts.
Prior this change was pager asserting with an error trace like below: E/TC:0 0 assertion 'is_user_ta_ctx(ctx)' failed at core/arch/arm/include/kernel/user_ta.h:56 <to_user_ta_ctx> E/TC:0 0 Panic at core/kernel/assert.c:28 <_assert_break>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|
| #
1f648d54 |
| 09-Oct-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: remove struct tee_ta_ctx from struct user_mode_ctx
Removes struct tee_ta_ctx from struct user_mode_ctx allowing a user mode entity to be independent of the TA concept, that is, making room for
core: remove struct tee_ta_ctx from struct user_mode_ctx
Removes struct tee_ta_ctx from struct user_mode_ctx allowing a user mode entity to be independent of the TA concept, that is, making room for SPs in user mode.
A pointer to a struct user_mode_ctx is passed to many memory management functions where a pointer to a struct ts_ctx is needed too. Prior to this patch it was possible to calculate that address of corresponding struct ts_ctx with help of the container_of() macro, that is no longer possible. Instead is a struct ts_ctx *ts_ctx field added to struct user_mode_ctx in order to allow such lookups.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
3560d990 |
| 01-Sep-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add generic struct ts_ctx
Adds the generic struct ts_ctx to be used instead of struct tee_ta_ctx where generic context operations are performed.
struct tee_ta_ctx adds a field with struct ts_
core: add generic struct ts_ctx
Adds the generic struct ts_ctx to be used instead of struct tee_ta_ctx where generic context operations are performed.
struct tee_ta_ctx adds a field with struct ts_ctx for conversion to struct ts_ctx where needed.
The struct ts_session is updated to keep a pointer to a struct ts_ctx instead of the previous struct tee_ta_ctx.
Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
3f37fffb |
| 06-May-2020 |
Sander Visser <github@visser.se> |
core: pager: refactored to fix NULL dereferencing
assert not NULL before dereferencing in tee_pager_add_core_area().
Signed-off-by: Sander Visser <github@visser.se> Reviewed-by: Jens Wiklander <jen
core: pager: refactored to fix NULL dereferencing
assert not NULL before dereferencing in tee_pager_add_core_area().
Signed-off-by: Sander Visser <github@visser.se> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
show more ...
|
| #
3639b55f |
| 04-May-2020 |
Jerome Forissier <jerome@forissier.org> |
core: rename KEEP_INIT() and KEEP_PAGER()
The KEEP_INIT() and KEEP_PAGER() macros are quite often used in C files immediately after the definition of a function or a structure without a blank line i
core: rename KEEP_INIT() and KEEP_PAGER()
The KEEP_INIT() and KEEP_PAGER() macros are quite often used in C files immediately after the definition of a function or a structure without a blank line in between. This style mimics what the Linux kernel does for a similar use cases: EXPORT_SYMBOL().
Unfortunately, the checkpatch.pl tool expects a blank line after structure and function definitions, except for a few special cases such as EXPORT_SYMBOL(). As a result we often get unwanted warnings when we use KEEP_INIT() and KEEP_PAGER(). Among the exceptions are all words starting with DECLARE_ or DEFINE_, so by renaming our macros we could avoid the checkpatch warnings.
This commit renames KEEP_INIT() and KEEP_PAGER() to DECLARE_KEEP_INIT() and DECLARE_KEEP_PAGER(), respectively. The assembler macros are also renamed for consistency. No functional change is expected.
Signed-off-by: Jerome Forissier <jerome@forissier.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|
| #
4c666179 |
| 19-Mar-2020 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix overflow in tee_pager_merge_um_region()
Fixes a possible overflow in tee_pager_merge_um_region() where len is a very large number.
Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Review
core: fix overflow in tee_pager_merge_um_region()
Fixes a possible overflow in tee_pager_merge_um_region() where len is a very large number.
Reviewed-by: Joakim Bech <joakim.bech@linaro.org> Reviewed-by: Jerome Forissier <jerome@forissier.org> Reported-by: Bastien Simondi <bsimondi@netflix.com> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
show more ...
|