core: riscv: Add TLB operation related to virtual address and ASID

Add TLB invalidate function which is corresponding to virtual address
and ASID. The commit also adds missing declaration of tlbi_va

core: riscv: Add TLB operation related to virtual address and ASID

Add TLB invalidate function which is corresponding to virtual address
and ASID. The commit also adds missing declaration of tlbi_va_allasid().

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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core: mm: Rename "mva" to "va" for TLB operations

The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename

core: mm: Rename "mva" to "va" for TLB operations

The terminology "mva" is specific for older ARM architecture which has
FCSE extension. To support multiple architecture, it would be good to
rename "mva" to common terminology, such as "va". This PR renames "mva"
to "va" in TLB operations for ARM64 and RISC-V. For ARM32, "mva" is
reserved because it is really defined in ARM32's documentations.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>

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core: riscv: mm: Add missing return for TLB helpers

These functions should contain tailing ret instruction to return to
caller.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome F

core: riscv: mm: Add missing return for TLB helpers

These functions should contain tailing ret instruction to return to
caller.

Signed-off-by: Alvin Chang <alvinga@andestech.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>

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riscv: mm: tlb_helpers_rv.S: translation look-aside buffer invalidate

Implement tlbi_all(), tlbi_mva_allasid() and tlbi_asid() using supervisor
memory-management fence instruction SFENCE.VMA.

Signe

riscv: mm: tlb_helpers_rv.S: translation look-aside buffer invalidate

Implement tlbi_all(), tlbi_mva_allasid() and tlbi_asid() using supervisor
memory-management fence instruction SFENCE.VMA.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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