Searched hist:e99d7193593cf6331ea04cd394a9a4cf18886ef0 (Results 1 – 5 of 5) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/ |
| H A D | immap_lsch2.h | e99d7193593cf6331ea04cd394a9a4cf18886ef0 Fri Apr 29 12:17:58 UTC 2016 Alex Porosanu <alexandru.porosanu@freescale.com> arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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| H A D | immap_lsch3.h | e99d7193593cf6331ea04cd394a9a4cf18886ef0 Fri Apr 29 12:17:58 UTC 2016 Alex Porosanu <alexandru.porosanu@freescale.com> arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx7/ |
| H A D | imx-regs.h | e99d7193593cf6331ea04cd394a9a4cf18886ef0 Fri Apr 29 12:17:58 UTC 2016 Alex Porosanu <alexandru.porosanu@freescale.com> arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-ls102xa/ |
| H A D | config.h | e99d7193593cf6331ea04cd394a9a4cf18886ef0 Fri Apr 29 12:17:58 UTC 2016 Alex Porosanu <alexandru.porosanu@freescale.com> arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx6/ |
| H A D | imx-regs.h | e99d7193593cf6331ea04cd394a9a4cf18886ef0 Fri Apr 29 12:17:58 UTC 2016 Alex Porosanu <alexandru.porosanu@freescale.com> arch/arm: add SEC JR0 offset
Freescale PPC SoCs do not hard-code security engine's Job Ring 0
address, rather a define is used. This patch adds the same
functionality to the ARM based SoCs (i.e. LS1/LS2 and i.MX parts)
Signed-off-by: Alex Porosanu <alexandru.porosanu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
|