Searched hist:e3563f2ec768fb989149362ca0c6ca4a27513924 (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/drivers/mmc/ |
| H A D | exynos_dw_mmc.c | e3563f2ec768fb989149362ca0c6ca4a27513924 Sun Aug 30 22:55:15 UTC 2015 Simon Glass <sjg@chromium.org> mmc: Support bypass mode with the get_mmc_clk() method
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
|
| H A D | dw_mmc.c | e3563f2ec768fb989149362ca0c6ca4a27513924 Sun Aug 30 22:55:15 UTC 2015 Simon Glass <sjg@chromium.org> mmc: Support bypass mode with the get_mmc_clk() method
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
|
| /rk3399_rockchip-uboot/include/ |
| H A D | dwmmc.h | e3563f2ec768fb989149362ca0c6ca4a27513924 Sun Aug 30 22:55:15 UTC 2015 Simon Glass <sjg@chromium.org> mmc: Support bypass mode with the get_mmc_clk() method
Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
|