dw_mmc: send the initialization clock with cmd0

Two TF cards fail to initialize under the controller configuration
CLKEN_LOW_PWR. It is necessary to add clock initialization when
sending the first c

dw_mmc: send the initialization clock with cmd0

Two TF cards fail to initialize under the controller configuration
CLKEN_LOW_PWR. It is necessary to add clock initialization when
sending the first command to resolve this issue.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I4d44bffd24d14131a61e2332fd555a3d6f92ed0c

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mmc: dw_mmc: set DWMCI_CARDTHRCTL

Since v2.80a, dwmmc controller introduced the card write threshold for
HS200 & HS400 mode. So CardThrCtl can be supported during write operation, not
only read oper

mmc: dw_mmc: set DWMCI_CARDTHRCTL

Since v2.80a, dwmmc controller introduced the card write threshold for
HS200 & HS400 mode. So CardThrCtl can be supported during write operation, not
only read operation.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I7f345660107c2978d2f874d36f2dffd2acdfbcb6

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mmc: dw_mmc: set DWMCI_MSIZE to 6

We set the fifo_depth to 0x100 word in Rockchip platform, and
fifo_depth/2 must be multiple of dma_multiple_transaction_size.
So we can set DWMCI_MSIZE to 6 accordi

mmc: dw_mmc: set DWMCI_MSIZE to 6

We set the fifo_depth to 0x100 word in Rockchip platform, and
fifo_depth/2 must be multiple of dma_multiple_transaction_size.
So we can set DWMCI_MSIZE to 6 according to max
dma_multiple_transaction_size being 128.

The DWMCI_MSIZE must be set as larger as possible. If not, dma fifo will
be full, and crc error occur when the clock stop during the data phase.

Change-Id: I013b6f9c272edbc723b2f627e88d30d653c42d1b
Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>

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mmc: dw_mmc: support transfer mode autodetection

dw_mmc supports two transfer modes in u-boot: idma and fifo.
This patch adds autodetection of transfer mode and eliminates setting this in host confi

mmc: dw_mmc: support transfer mode autodetection

dw_mmc supports two transfer modes in u-boot: idma and fifo.
This patch adds autodetection of transfer mode and eliminates setting this in host config struct

Change-Id: I0eafb78c3fd171827664e320b8959f3c5e27094a
Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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mmc: dwmmc: Add stride PIO for better burst mode support

This patch enables stride PIO for better burst mode
support on some rockchip platforms, for instance rk3128,
etc. It uses ldm and stm to make

mmc: dwmmc: Add stride PIO for better burst mode support

This patch enables stride PIO for better burst mode
support on some rockchip platforms, for instance rk3128,
etc. It uses ldm and stm to make multiple accessing from
CPU under some ARM architecture.

Design Note:
1) Carefully test it beyond the armv7(m) core since I don't
test them! If you disassemble the code, dwmci_memcpy_fromio
may be changed to use ldmia.w and stmia.w, as well as some
other optimization for push/pop stack operation, but they
are all fine!
2) Do *NOT* remove noinline and __volatile attributes as
you could fall into trouble by the optimization of GCC.
And please invent new attributes if you use *OTHER* compilers
which have their own keywords claiming the function to be a
"plase don't inline the function and please don't reorder the
groups".
3) If you want to use this feature for other rockchip platforms,
you could append new config in rockchip_dw_mmc.c. But now we only
have CONFIG_ROCKCHIP_RK3128 which means we just enable it for
rk312x platforms.
4) Stride PIO is determined by both of host->stride_pio and
the data payload. The intention of it is to make the block
accessing faster. So now only enable it for who's data payload
is larger(or equal to)than 512 Bytes.
5) MAX_STRIDE means we support burst MAX_STRIDE * 4 Bytes per
stride. Of course you could change that, but please read the
comment before it in the code and do it carefully.

How to test?
1) Prepare a memory, for instance, 0x70000000 on RK3126c.

=> mw 0x70000000 0x55aa55aa 0x200

2) Check it to see if 0x70000000 ~ 0x700000200 are all 0x55aa55aa

=> md 0x70000000 0x200
70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
....

3) Fetch data of 0x70000000 ~ 0x700000200 and wrrite them to eMMC,
for instance, LBA 0x10000, and blk count is 1 as one blk means 0x200
bytes.

=> mmc write 0x70000000 0x10000 1

MMC write: dev # 0, block # 65536, count 1 ... 1 blocks written: OK

4) Clean the merory buffer and double check it

=> mw 0x70000000 0x0 0x200
=> md 0x70000000 0x200
70000000: 00000000 00000000 00000000 00000000 ................
70000010: 00000000 00000000 00000000 00000000 ................
70000020: 00000000 00000000 00000000 00000000 ................
....

5) Well, now let's read back the data from eMMC from the LBA
we wrote before.

=> mmc read 0x70000000 0x10000 1

MMC read: dev # 0, block # 65536, count 1 ... 1 blocks read: OK

6) We expect the 0x70000000 ~ 0x700000200 should be 0x55aa55aa instead
of 0x0 which is cleared by step 4).

=> md 0x70000000 0x200
70000000: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000010: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000020: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
70000030: 55aa55aa 55aa55aa 55aa55aa 55aa55aa .U.U.U.U.U.U.U.U
....

Great, we see that the write and read eMMC are finished well and
the data payload is correct as expected!

Change-Id: I9b68c335449550b95f1a8f5841d46821346e45af
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

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mmc: dw_mmc: add the support for the tuning scheme

For the HS200/HS400/SDR104, tuning is needed to determine the optimal
sampling point. Actual tuning procedure is provided by specific host
controll

mmc: dw_mmc: add the support for the tuning scheme

For the HS200/HS400/SDR104, tuning is needed to determine the optimal
sampling point. Actual tuning procedure is provided by specific host
controller driver.

Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>

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Merge branch 'master' of git://git.denx.de/u-boot-mmc

dm: mmc: Drop CONFIG_DM_MMC_OPS

All boards which use DM_MMC have now been converted to use DM_MMC_OPS.
Drop the option and good riddance.

Signed-off-by: Simon Glass <sjg@chromium.org>

Merge branch 'master' of http://git.denx.de/u-boot-mmc

mmc: dw_mmc: remove the unnecessary arguments for dwmci_setup_cfg

Some arguments don't need to pass to dwmci_setup_cfg.
They are already included in dwmci_host structure.

Signed-off-by: Jaehoon Chu

mmc: dw_mmc: remove the unnecessary arguments for dwmci_setup_cfg

Some arguments don't need to pass to dwmci_setup_cfg.
They are already included in dwmci_host structure.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot-mmc

mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to use the FIFO_MASK
as 0x1FFF, no

mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bit

According to DesignWare TRM, FIFO_COUNT is bit[29:17].
If get the correct fifo_count value, it has to use the FIFO_MASK
as 0x1FFF, not 0x1FF.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com>

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Merge git://git.denx.de/u-boot-dm

dm: mmc: dwmmc: use the callback functions as static

There are no places to call these functions.
It should be used the callback function.
Then it can be used as static functions.

Signed-off-by: Ja

dm: mmc: dwmmc: use the callback functions as static

There are no places to call these functions.
It should be used the callback function.
Then it can be used as static functions.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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dm: mmc: dwmmc: fix the wrong explanation for clock values

This e,g is wrong. Maximum/minimum e.g values are swapped each other.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: S

dm: mmc: dwmmc: fix the wrong explanation for clock values

This e,g is wrong. Maximum/minimum e.g values are swapped each other.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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dm: mmc: dwmmc: Support CONFIG_DM_MMC_OPS

Add support to dwmmc for using driver model for MMC operations.

Signed-off-by: Simon Glass <sjg@chromium.org>

dm: mmc: dwmmc: Add comments to the dwmmc setup functions

These comments were missed when the original code was written. Add them to
help people port their drivers over.

Signed-off-by: Simon Glass

dm: mmc: dwmmc: Add comments to the dwmmc setup functions

These comments were missed when the original code was written. Add them to
help people port their drivers over.

Signed-off-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot-dm

For odroid-c2 (arch-meson) for now disable designware eth as meson
now needs to do some harder GPIO work.

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:

Merge git://git.denx.de/u-boot-dm

For odroid-c2 (arch-meson) for now disable designware eth as meson
now needs to do some harder GPIO work.

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
lib/efi_loader/efi_disk.c

Modified:
configs/odroid-c2_defconfig

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dm: mmc: dwmmc: Support CONFIG_BLK

Add support for using driver model for block devices in this driver.

Signed-off-by: Simon Glass <sjg@chromium.org>

mmc: dw_mmc: support fifo mode in dwc mmc driver

some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.

Signed-off-by: Lin Huang <hl@rock-ch

mmc: dw_mmc: support fifo mode in dwc mmc driver

some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.

Signed-off-by: Lin Huang <hl@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>

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Merge git://git.denx.de/u-boot-rockchip

mmc: Support bypass mode with the get_mmc_clk() method

Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to suppo

mmc: Support bypass mode with the get_mmc_clk() method

Some SoCs want to adjust the input clock to the DWMMC block as a way of
controlling the MMC bus clock. Update the get_mmc_clk() method to support
this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>

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mmc: Add structure comments for dwmmc

It took a little while to figure this out, so this patch adds documentation
to help the next person who needs to do this.

Signed-off-by: Simon Glass <sjg@chrom

mmc: Add structure comments for dwmmc

It took a little while to figure this out, so this patch adds documentation
to help the next person who needs to do this.

Signed-off-by: Simon Glass <sjg@chromium.org>

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Merge branch 'master' of git://git.denx.de/u-boot