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/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dneoverse_n2.hc948185c973c13df36c62c4bcb50e22b14d6e06a Thu Oct 21 01:28:58 UTC 2021 nayanpatel-arm <nayankumar.patel@arm.com> fix(errata): workaround for Neoverse-N2 erratum 2138958

Neoverse-N2 erratum 2138958 is a Cat B erratum that applies to
revision r0p0 of CPU. It is still open. The workaround
is to set CPUACTLR5_EL1[13] to 1'b1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com>
Change-Id: I5247f8f8eef08d38c169aad6d2c5501ac387c720
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dneoverse_n2.Sc948185c973c13df36c62c4bcb50e22b14d6e06a Thu Oct 21 01:28:58 UTC 2021 nayanpatel-arm <nayankumar.patel@arm.com> fix(errata): workaround for Neoverse-N2 erratum 2138958

Neoverse-N2 erratum 2138958 is a Cat B erratum that applies to
revision r0p0 of CPU. It is still open. The workaround
is to set CPUACTLR5_EL1[13] to 1'b1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com>
Change-Id: I5247f8f8eef08d38c169aad6d2c5501ac387c720
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rstc948185c973c13df36c62c4bcb50e22b14d6e06a Thu Oct 21 01:28:58 UTC 2021 nayanpatel-arm <nayankumar.patel@arm.com> fix(errata): workaround for Neoverse-N2 erratum 2138958

Neoverse-N2 erratum 2138958 is a Cat B erratum that applies to
revision r0p0 of CPU. It is still open. The workaround
is to set CPUACTLR5_EL1[13] to 1'b1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com>
Change-Id: I5247f8f8eef08d38c169aad6d2c5501ac387c720
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mkc948185c973c13df36c62c4bcb50e22b14d6e06a Thu Oct 21 01:28:58 UTC 2021 nayanpatel-arm <nayankumar.patel@arm.com> fix(errata): workaround for Neoverse-N2 erratum 2138958

Neoverse-N2 erratum 2138958 is a Cat B erratum that applies to
revision r0p0 of CPU. It is still open. The workaround
is to set CPUACTLR5_EL1[13] to 1'b1.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: nayanpatel-arm <nayankumar.patel@arm.com>
Change-Id: I5247f8f8eef08d38c169aad6d2c5501ac387c720