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/optee_os/core/arch/arm/dts/
H A Dstm32mp135f-dk.dtsb867b07e6a63ec7f0ba488cc65cdb44178c2d3d2 Wed Dec 07 17:41:28 UTC 2022 Gatien Chevallier <gatien.chevallier@foss.st.com> dts: stm32: add nvmem layout

Add the nvmem layout for each BSEC associated fuses, update the SOC and
ST boards device trees with OTP cells node.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
H A Dstm32mp131.dtsib867b07e6a63ec7f0ba488cc65cdb44178c2d3d2 Wed Dec 07 17:41:28 UTC 2022 Gatien Chevallier <gatien.chevallier@foss.st.com> dts: stm32: add nvmem layout

Add the nvmem layout for each BSEC associated fuses, update the SOC and
ST boards device trees with OTP cells node.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
H A Dstm32mp151.dtsib867b07e6a63ec7f0ba488cc65cdb44178c2d3d2 Wed Dec 07 17:41:28 UTC 2022 Gatien Chevallier <gatien.chevallier@foss.st.com> dts: stm32: add nvmem layout

Add the nvmem layout for each BSEC associated fuses, update the SOC and
ST boards device trees with OTP cells node.

Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>