Searched hist:b2259261815961042d2a994401929bc76a0d3ee9 (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/plat/xilinx/versal_net/ |
| H A D | plat_psci.c | b2259261815961042d2a994401929bc76a0d3ee9 Fri Oct 06 04:55:28 UTC 2023 Jay Buddhabhatti <jay.buddhabhatti@amd.com> fix(versal-net): use arm common GIC handlers
Currently SGI interrupts are not received in secondary cores because
of issue in GIC configuration. In current Versal NET specific GIC
functions, redistributor configuration is not happening properly.
Because of that SGI interrupt from one processor to another processor
is not transferring. So, use common GIC handlers which will iterate
over all GIC redistributor frames and discovers per cpu redistributor
frame. Also, it initializes corresponding interface in GICv3.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I1433260b8520d6a315fdf5df86bd0688f92d211a
|
| H A D | plat_psci_pm.c | b2259261815961042d2a994401929bc76a0d3ee9 Fri Oct 06 04:55:28 UTC 2023 Jay Buddhabhatti <jay.buddhabhatti@amd.com> fix(versal-net): use arm common GIC handlers
Currently SGI interrupts are not received in secondary cores because
of issue in GIC configuration. In current Versal NET specific GIC
functions, redistributor configuration is not happening properly.
Because of that SGI interrupt from one processor to another processor
is not transferring. So, use common GIC handlers which will iterate
over all GIC redistributor frames and discovers per cpu redistributor
frame. Also, it initializes corresponding interface in GICv3.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I1433260b8520d6a315fdf5df86bd0688f92d211a
|
| H A D | platform.mk | b2259261815961042d2a994401929bc76a0d3ee9 Fri Oct 06 04:55:28 UTC 2023 Jay Buddhabhatti <jay.buddhabhatti@amd.com> fix(versal-net): use arm common GIC handlers
Currently SGI interrupts are not received in secondary cores because
of issue in GIC configuration. In current Versal NET specific GIC
functions, redistributor configuration is not happening properly.
Because of that SGI interrupt from one processor to another processor
is not transferring. So, use common GIC handlers which will iterate
over all GIC redistributor frames and discovers per cpu redistributor
frame. Also, it initializes corresponding interface in GICv3.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I1433260b8520d6a315fdf5df86bd0688f92d211a
|
| H A D | bl31_versal_net_setup.c | b2259261815961042d2a994401929bc76a0d3ee9 Fri Oct 06 04:55:28 UTC 2023 Jay Buddhabhatti <jay.buddhabhatti@amd.com> fix(versal-net): use arm common GIC handlers
Currently SGI interrupts are not received in secondary cores because
of issue in GIC configuration. In current Versal NET specific GIC
functions, redistributor configuration is not happening properly.
Because of that SGI interrupt from one processor to another processor
is not transferring. So, use common GIC handlers which will iterate
over all GIC redistributor frames and discovers per cpu redistributor
frame. Also, it initializes corresponding interface in GICv3.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I1433260b8520d6a315fdf5df86bd0688f92d211a
|
| /rk3399_ARM-atf/plat/xilinx/versal_net/aarch64/ |
| H A D | versal_net_helpers.S | b2259261815961042d2a994401929bc76a0d3ee9 Fri Oct 06 04:55:28 UTC 2023 Jay Buddhabhatti <jay.buddhabhatti@amd.com> fix(versal-net): use arm common GIC handlers
Currently SGI interrupts are not received in secondary cores because
of issue in GIC configuration. In current Versal NET specific GIC
functions, redistributor configuration is not happening properly.
Because of that SGI interrupt from one processor to another processor
is not transferring. So, use common GIC handlers which will iterate
over all GIC redistributor frames and discovers per cpu redistributor
frame. Also, it initializes corresponding interface in GICv3.
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I1433260b8520d6a315fdf5df86bd0688f92d211a
|