Searched hist:ac252f95dd5089cfa9676d15a11018f8f41e692e (Results 1 – 5 of 5) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/drivers/mce/ |
| H A D | mce.c | ac252f95dd5089cfa9676d15a11018f8f41e692e Thu Aug 10 08:01:42 UTC 2017 Dilan Lee <dilee@nvidia.com> Tegra194: mce: enable strict checking
"Strict checking" is a mode where secure world can access
secure-only areas unlike legacy mode where secure world could
access non-secure spaces as well. Secure-only areas are defined
as the TZ-DRAM carveout and any GSC with the CPU_SECURE bit set.
This mode not only helps prevent issues with IO-Coherency but aids
with security as well.
This patch implements the programming sequence required to enable
strict checking mode for Tegra194 SoCs.
Change-Id: Ic2e594f79ec7c5bc1339b509e67c4c62efb9d0c0
Signed-off-by: Dilan Lee <dilee@nvidia.com>
|
| H A D | nvg.c | ac252f95dd5089cfa9676d15a11018f8f41e692e Thu Aug 10 08:01:42 UTC 2017 Dilan Lee <dilee@nvidia.com> Tegra194: mce: enable strict checking
"Strict checking" is a mode where secure world can access
secure-only areas unlike legacy mode where secure world could
access non-secure spaces as well. Secure-only areas are defined
as the TZ-DRAM carveout and any GSC with the CPU_SECURE bit set.
This mode not only helps prevent issues with IO-Coherency but aids
with security as well.
This patch implements the programming sequence required to enable
strict checking mode for Tegra194 SoCs.
Change-Id: Ic2e594f79ec7c5bc1339b509e67c4c62efb9d0c0
Signed-off-by: Dilan Lee <dilee@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/drivers/include/ |
| H A D | mce_private.h | ac252f95dd5089cfa9676d15a11018f8f41e692e Thu Aug 10 08:01:42 UTC 2017 Dilan Lee <dilee@nvidia.com> Tegra194: mce: enable strict checking
"Strict checking" is a mode where secure world can access
secure-only areas unlike legacy mode where secure world could
access non-secure spaces as well. Secure-only areas are defined
as the TZ-DRAM carveout and any GSC with the CPU_SECURE bit set.
This mode not only helps prevent issues with IO-Coherency but aids
with security as well.
This patch implements the programming sequence required to enable
strict checking mode for Tegra194 SoCs.
Change-Id: Ic2e594f79ec7c5bc1339b509e67c4c62efb9d0c0
Signed-off-by: Dilan Lee <dilee@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t194/ |
| H A D | plat_setup.c | ac252f95dd5089cfa9676d15a11018f8f41e692e Thu Aug 10 08:01:42 UTC 2017 Dilan Lee <dilee@nvidia.com> Tegra194: mce: enable strict checking
"Strict checking" is a mode where secure world can access
secure-only areas unlike legacy mode where secure world could
access non-secure spaces as well. Secure-only areas are defined
as the TZ-DRAM carveout and any GSC with the CPU_SECURE bit set.
This mode not only helps prevent issues with IO-Coherency but aids
with security as well.
This patch implements the programming sequence required to enable
strict checking mode for Tegra194 SoCs.
Change-Id: Ic2e594f79ec7c5bc1339b509e67c4c62efb9d0c0
Signed-off-by: Dilan Lee <dilee@nvidia.com>
|
| H A D | plat_psci_handlers.c | ac252f95dd5089cfa9676d15a11018f8f41e692e Thu Aug 10 08:01:42 UTC 2017 Dilan Lee <dilee@nvidia.com> Tegra194: mce: enable strict checking
"Strict checking" is a mode where secure world can access
secure-only areas unlike legacy mode where secure world could
access non-secure spaces as well. Secure-only areas are defined
as the TZ-DRAM carveout and any GSC with the CPU_SECURE bit set.
This mode not only helps prevent issues with IO-Coherency but aids
with security as well.
This patch implements the programming sequence required to enable
strict checking mode for Tegra194 SoCs.
Change-Id: Ic2e594f79ec7c5bc1339b509e67c4c62efb9d0c0
Signed-off-by: Dilan Lee <dilee@nvidia.com>
|