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/rk3399_ARM-atf/services/std_svc/spm/spm_mm/
H A Dspm_mm_setup.ca0d9a973a442c0dcad789d5e91ca3284d981923a Tue Jul 30 16:04:23 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> chore(cm): reorganise sctlr_el1 and tcr_el1 ctx code

SCTLR_EL1 and TCR_EL1 regs are included either as part of errata
"ERRATA_SPECULATIVE_AT" or under el1_sysregs_t context structure.
The code to write and read into these context entries, looks
repetitive and is invoked at most places.
This section is refactored to bring them under a static procedure,
keeping the code neat and easier to maintain.

Change-Id: Ib0d8c51bee09e1600c5baaa7f9745083dca9fee1
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
/rk3399_ARM-atf/plat/arm/board/neoverse_rd/common/ras/
H A Dnrd_ras_cpu.ca0d9a973a442c0dcad789d5e91ca3284d981923a Tue Jul 30 16:04:23 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> chore(cm): reorganise sctlr_el1 and tcr_el1 ctx code

SCTLR_EL1 and TCR_EL1 regs are included either as part of errata
"ERRATA_SPECULATIVE_AT" or under el1_sysregs_t context structure.
The code to write and read into these context entries, looks
repetitive and is invoked at most places.
This section is refactored to bring them under a static procedure,
keeping the code neat and easier to maintain.

Change-Id: Ib0d8c51bee09e1600c5baaa7f9745083dca9fee1
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
/rk3399_ARM-atf/services/std_svc/spm/el3_spmc/
H A Dspmc_setup.ca0d9a973a442c0dcad789d5e91ca3284d981923a Tue Jul 30 16:04:23 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> chore(cm): reorganise sctlr_el1 and tcr_el1 ctx code

SCTLR_EL1 and TCR_EL1 regs are included either as part of errata
"ERRATA_SPECULATIVE_AT" or under el1_sysregs_t context structure.
The code to write and read into these context entries, looks
repetitive and is invoked at most places.
This section is refactored to bring them under a static procedure,
keeping the code neat and easier to maintain.

Change-Id: Ib0d8c51bee09e1600c5baaa7f9745083dca9fee1
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
/rk3399_ARM-atf/include/lib/el3_runtime/aarch64/
H A Dcontext.ha0d9a973a442c0dcad789d5e91ca3284d981923a Tue Jul 30 16:04:23 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> chore(cm): reorganise sctlr_el1 and tcr_el1 ctx code

SCTLR_EL1 and TCR_EL1 regs are included either as part of errata
"ERRATA_SPECULATIVE_AT" or under el1_sysregs_t context structure.
The code to write and read into these context entries, looks
repetitive and is invoked at most places.
This section is refactored to bring them under a static procedure,
keeping the code neat and easier to maintain.

Change-Id: Ib0d8c51bee09e1600c5baaa7f9745083dca9fee1
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>
/rk3399_ARM-atf/lib/el3_runtime/aarch64/
H A Dcontext_mgmt.ca0d9a973a442c0dcad789d5e91ca3284d981923a Tue Jul 30 16:04:23 UTC 2024 Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> chore(cm): reorganise sctlr_el1 and tcr_el1 ctx code

SCTLR_EL1 and TCR_EL1 regs are included either as part of errata
"ERRATA_SPECULATIVE_AT" or under el1_sysregs_t context structure.
The code to write and read into these context entries, looks
repetitive and is invoked at most places.
This section is refactored to bring them under a static procedure,
keeping the code neat and easier to maintain.

Change-Id: Ib0d8c51bee09e1600c5baaa7f9745083dca9fee1
Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>