Searched hist:"7 cfae93227be77f137265e8de4f1331e5d7beb3a" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | neoverse_n2.h | 7cfae93227be77f137265e8de4f1331e5d7beb3a Mon Aug 30 18:02:51 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2189731
Neoverse N2 erratum 2189731 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to
invalidate the hardware prefetcher state trained from any EL.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Iddc6a59adf9fa3cab560c46f2133e1f5a8b3ad03
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_n2.S | 7cfae93227be77f137265e8de4f1331e5d7beb3a Mon Aug 30 18:02:51 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2189731
Neoverse N2 erratum 2189731 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to
invalidate the hardware prefetcher state trained from any EL.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Iddc6a59adf9fa3cab560c46f2133e1f5a8b3ad03
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 7cfae93227be77f137265e8de4f1331e5d7beb3a Mon Aug 30 18:02:51 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2189731
Neoverse N2 erratum 2189731 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to
invalidate the hardware prefetcher state trained from any EL.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Iddc6a59adf9fa3cab560c46f2133e1f5a8b3ad03
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 7cfae93227be77f137265e8de4f1331e5d7beb3a Mon Aug 30 18:02:51 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2189731
Neoverse N2 erratum 2189731 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR5_EL1[44] to 1 which will cause the CPP instruction to
invalidate the hardware prefetcher state trained from any EL.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Iddc6a59adf9fa3cab560c46f2133e1f5a8b3ad03
|