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/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dneoverse_n2.h75384389b9539b5d66aadecb10dae1c70e97e383 Mon Oct 06 10:59:20 UTC 2025 Rohit Ner <rohitner@google.com> feat(cpus): add support for Neoverse-N2 prefetcher

To get accurate and repeatable L2 cache performance metrics,
the L2 region prefetcher must be disabled. This prevents
speculative fetches from interfering with the measurements.

This patch adds a build-time option, NEOVERSE_N2_PREFETCHER_DISABLE,
to set the PF_DIS bit (bit 15) in the CPUECTLR_EL1 register for this
purpose.

Change-Id: Ie7ab9e84bb29d042d0bb2ec697e0c1e39ad5032e
Signed-off-by: Rohit Ner <rohitner@google.com>
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dneoverse_n2.S75384389b9539b5d66aadecb10dae1c70e97e383 Mon Oct 06 10:59:20 UTC 2025 Rohit Ner <rohitner@google.com> feat(cpus): add support for Neoverse-N2 prefetcher

To get accurate and repeatable L2 cache performance metrics,
the L2 region prefetcher must be disabled. This prevents
speculative fetches from interfering with the measurements.

This patch adds a build-time option, NEOVERSE_N2_PREFETCHER_DISABLE,
to set the PF_DIS bit (bit 15) in the CPUECTLR_EL1 register for this
purpose.

Change-Id: Ie7ab9e84bb29d042d0bb2ec697e0c1e39ad5032e
Signed-off-by: Rohit Ner <rohitner@google.com>
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst75384389b9539b5d66aadecb10dae1c70e97e383 Mon Oct 06 10:59:20 UTC 2025 Rohit Ner <rohitner@google.com> feat(cpus): add support for Neoverse-N2 prefetcher

To get accurate and repeatable L2 cache performance metrics,
the L2 region prefetcher must be disabled. This prevents
speculative fetches from interfering with the measurements.

This patch adds a build-time option, NEOVERSE_N2_PREFETCHER_DISABLE,
to set the PF_DIS bit (bit 15) in the CPUECTLR_EL1 register for this
purpose.

Change-Id: Ie7ab9e84bb29d042d0bb2ec697e0c1e39ad5032e
Signed-off-by: Rohit Ner <rohitner@google.com>
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mk75384389b9539b5d66aadecb10dae1c70e97e383 Mon Oct 06 10:59:20 UTC 2025 Rohit Ner <rohitner@google.com> feat(cpus): add support for Neoverse-N2 prefetcher

To get accurate and repeatable L2 cache performance metrics,
the L2 region prefetcher must be disabled. This prevents
speculative fetches from interfering with the measurements.

This patch adds a build-time option, NEOVERSE_N2_PREFETCHER_DISABLE,
to set the PF_DIS bit (bit 15) in the CPUECTLR_EL1 register for this
purpose.

Change-Id: Ie7ab9e84bb29d042d0bb2ec697e0c1e39ad5032e
Signed-off-by: Rohit Ner <rohitner@google.com>