Searched hist:"6 fbc98b15d92d881c4fbb74fd1344f0ef3f128ad" (Results 1 – 2 of 2) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | neoverse_n3.h | 6fbc98b15d92d881c4fbb74fd1344f0ef3f128ad Thu May 09 00:22:38 UTC 2024 Younghyun Park <younghyunpark@google.com> feat(cpus): support to update External LLC presence in Neoverse N3
The CPUECTLR_EL1.EXTLLC bit indicates that an external last level
cache(LLC) is present in the system. The default value is internal LLC.
Some systems which may have External LLC can enable the External LLC
presece with the build option 'NEOVERSE_Nx_EXTERNAL_LLC'.
Change-Id: I2567283a55c0d6e2f9fd986b7dbab91c7a815d3d
Signed-off-by: Younghyun Park <younghyunpark@google.com>
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | neoverse_n3.S | 6fbc98b15d92d881c4fbb74fd1344f0ef3f128ad Thu May 09 00:22:38 UTC 2024 Younghyun Park <younghyunpark@google.com> feat(cpus): support to update External LLC presence in Neoverse N3
The CPUECTLR_EL1.EXTLLC bit indicates that an external last level
cache(LLC) is present in the system. The default value is internal LLC.
Some systems which may have External LLC can enable the External LLC
presece with the build option 'NEOVERSE_Nx_EXTERNAL_LLC'.
Change-Id: I2567283a55c0d6e2f9fd986b7dbab91c7a815d3d
Signed-off-by: Younghyun Park <younghyunpark@google.com>
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