Searched hist:"6 bfdfc4f06129283b7d3c9caa66fc89e97fc5189" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_rockchip-uboot/include/dt-bindings/clock/ |
| H A D | rk3399-cru.h | 6bfdfc4f06129283b7d3c9caa66fc89e97fc5189 Mon Jun 25 07:55:48 UTC 2018 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: rk3399: support dual pll for vop
set the vop's parent just vpll and cpll,
set vop parent in dts node,the same as kernel setting.
i.e:
&vopb {
status = "okay";
assigned-clocks = <&cru DCLK_VOP0_DIV>;
assigned-clock-parents = <&cru PLL_VPLL>;
};
&vopl {
status = "okay";
assigned-clocks = <&cru DCLK_VOP1_DIV>;
assigned-clock-parents = <&cru PLL_CPLL>;
};
Change-Id: I07ab4e2837cf7fc0860e8b4d14adb8936f5cb27a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
|
| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/ |
| H A D | cru_rk3399.h | 6bfdfc4f06129283b7d3c9caa66fc89e97fc5189 Mon Jun 25 07:55:48 UTC 2018 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: rk3399: support dual pll for vop
set the vop's parent just vpll and cpll,
set vop parent in dts node,the same as kernel setting.
i.e:
&vopb {
status = "okay";
assigned-clocks = <&cru DCLK_VOP0_DIV>;
assigned-clock-parents = <&cru PLL_VPLL>;
};
&vopl {
status = "okay";
assigned-clocks = <&cru DCLK_VOP1_DIV>;
assigned-clock-parents = <&cru PLL_CPLL>;
};
Change-Id: I07ab4e2837cf7fc0860e8b4d14adb8936f5cb27a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
|
| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3399.c | 6bfdfc4f06129283b7d3c9caa66fc89e97fc5189 Mon Jun 25 07:55:48 UTC 2018 Elaine Zhang <zhangqing@rock-chips.com> clk: rockchip: rk3399: support dual pll for vop
set the vop's parent just vpll and cpll,
set vop parent in dts node,the same as kernel setting.
i.e:
&vopb {
status = "okay";
assigned-clocks = <&cru DCLK_VOP0_DIV>;
assigned-clock-parents = <&cru PLL_VPLL>;
};
&vopl {
status = "okay";
assigned-clocks = <&cru DCLK_VOP1_DIV>;
assigned-clock-parents = <&cru PLL_CPLL>;
};
Change-Id: I07ab4e2837cf7fc0860e8b4d14adb8936f5cb27a
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
|