Searched hist:"672 eb21e26a41657b8146372d4283e794b430c5f" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a78c.h | 672eb21e26a41657b8146372d4283e794b430c5f Tue Mar 14 15:04:23 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78C erratum 1827430
Cortex-A78C erratum 1827430 is a Cat B erratum that applies to
revision r0p0 and is fixed in r0p1.
The workaround is to set the CPUECTLR_EL1[53] to 1, which disables
allocation of splintered pages in the L2 TLB.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie68771bdd3bddeff54d06b6a456dad4a7fc27426
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| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a78c.S | 672eb21e26a41657b8146372d4283e794b430c5f Tue Mar 14 15:04:23 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78C erratum 1827430
Cortex-A78C erratum 1827430 is a Cat B erratum that applies to
revision r0p0 and is fixed in r0p1.
The workaround is to set the CPUECTLR_EL1[53] to 1, which disables
allocation of splintered pages in the L2 TLB.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie68771bdd3bddeff54d06b6a456dad4a7fc27426
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 672eb21e26a41657b8146372d4283e794b430c5f Tue Mar 14 15:04:23 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78C erratum 1827430
Cortex-A78C erratum 1827430 is a Cat B erratum that applies to
revision r0p0 and is fixed in r0p1.
The workaround is to set the CPUECTLR_EL1[53] to 1, which disables
allocation of splintered pages in the L2 TLB.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie68771bdd3bddeff54d06b6a456dad4a7fc27426
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 672eb21e26a41657b8146372d4283e794b430c5f Tue Mar 14 15:04:23 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78C erratum 1827430
Cortex-A78C erratum 1827430 is a Cat B erratum that applies to
revision r0p0 and is fixed in r0p1.
The workaround is to set the CPUECTLR_EL1[53] to 1, which disables
allocation of splintered pages in the L2 TLB.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie68771bdd3bddeff54d06b6a456dad4a7fc27426
|