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/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dneoverse_n2.h65e04f27d42c5eccdb3893e41e25363f396e42ed Tue Mar 30 21:08:32 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2067956

Neoverse N2 erratum 2067956 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR_EL1[46] to force L2 tag ECC inline correction mode.
This workaround works on revision r0p0.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie92d18a379c66675b5c1c50fd0b8dde130848b21
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dneoverse_n2.S65e04f27d42c5eccdb3893e41e25363f396e42ed Tue Mar 30 21:08:32 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2067956

Neoverse N2 erratum 2067956 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR_EL1[46] to force L2 tag ECC inline correction mode.
This workaround works on revision r0p0.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie92d18a379c66675b5c1c50fd0b8dde130848b21
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst65e04f27d42c5eccdb3893e41e25363f396e42ed Tue Mar 30 21:08:32 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2067956

Neoverse N2 erratum 2067956 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR_EL1[46] to force L2 tag ECC inline correction mode.
This workaround works on revision r0p0.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie92d18a379c66675b5c1c50fd0b8dde130848b21
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mk65e04f27d42c5eccdb3893e41e25363f396e42ed Tue Mar 30 21:08:32 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2067956

Neoverse N2 erratum 2067956 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR_EL1[46] to force L2 tag ECC inline correction mode.
This workaround works on revision r0p0.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie92d18a379c66675b5c1c50fd0b8dde130848b21