Searched hist:"613 aa4d50e7c592bad2cd38d06650c4de386fe7a" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_rockchip-uboot/include/configs/ |
| H A D | k2g_evm.h | 613aa4d50e7c592bad2cd38d06650c4de386fe7a Wed Jan 24 05:14:06 UTC 2018 Vignesh R <vigneshr@ti.com> UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de03ac0136d64641a3eab526c6810387.
Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
(cherry picked from commit a743e2ba3837db5e8499b03f0f57c3610d03a570)
Change-Id: I793c697ad11d10259e233b2a6b0fe6e6f0b3df85
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| H A D | stv0991.h | 613aa4d50e7c592bad2cd38d06650c4de386fe7a Wed Jan 24 05:14:06 UTC 2018 Vignesh R <vigneshr@ti.com> UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de03ac0136d64641a3eab526c6810387.
Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
(cherry picked from commit a743e2ba3837db5e8499b03f0f57c3610d03a570)
Change-Id: I793c697ad11d10259e233b2a6b0fe6e6f0b3df85
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| H A D | socfpga_common.h | 613aa4d50e7c592bad2cd38d06650c4de386fe7a Wed Jan 24 05:14:06 UTC 2018 Vignesh R <vigneshr@ti.com> UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de03ac0136d64641a3eab526c6810387.
Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
(cherry picked from commit a743e2ba3837db5e8499b03f0f57c3610d03a570)
Change-Id: I793c697ad11d10259e233b2a6b0fe6e6f0b3df85
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| /rk3399_rockchip-uboot/drivers/spi/ |
| H A D | cadence_qspi_apb.c | 613aa4d50e7c592bad2cd38d06650c4de386fe7a Wed Jan 24 05:14:06 UTC 2018 Vignesh R <vigneshr@ti.com> UPSTREAM: Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de03ac0136d64641a3eab526c6810387.
Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
(cherry picked from commit a743e2ba3837db5e8499b03f0f57c3610d03a570)
Change-Id: I793c697ad11d10259e233b2a6b0fe6e6f0b3df85
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|