Searched hist:"5 d3c1f58905d3b7350e02c4687dceaf0971700b3" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a78c.h | 5d3c1f58905d3b7350e02c4687dceaf0971700b3 Tue Sep 06 10:23:25 UTC 2022 Akram Ahmad <Akram.Ahmad@arm.com> fix(cpus): workaround for Cortex-A78C erratum 2376749
Cortex-A78C erratum 2376749 is a Cat B erratum that applies
to revisions r0p1 and r0p2 of the A78C and is currently open.
The workaround is to set CPUACTLR2_EL1[0] to 1 to force
PLDW/PFRM ST to behave like PLD/PRFM LD and not cause
invalidations to other PE caches.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2004089/latest
Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: I3b29f4b7f167bf499d5d11ffef91a94861bd1383
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a78c.S | 5d3c1f58905d3b7350e02c4687dceaf0971700b3 Tue Sep 06 10:23:25 UTC 2022 Akram Ahmad <Akram.Ahmad@arm.com> fix(cpus): workaround for Cortex-A78C erratum 2376749
Cortex-A78C erratum 2376749 is a Cat B erratum that applies
to revisions r0p1 and r0p2 of the A78C and is currently open.
The workaround is to set CPUACTLR2_EL1[0] to 1 to force
PLDW/PFRM ST to behave like PLD/PRFM LD and not cause
invalidations to other PE caches.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2004089/latest
Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: I3b29f4b7f167bf499d5d11ffef91a94861bd1383
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 5d3c1f58905d3b7350e02c4687dceaf0971700b3 Tue Sep 06 10:23:25 UTC 2022 Akram Ahmad <Akram.Ahmad@arm.com> fix(cpus): workaround for Cortex-A78C erratum 2376749
Cortex-A78C erratum 2376749 is a Cat B erratum that applies
to revisions r0p1 and r0p2 of the A78C and is currently open.
The workaround is to set CPUACTLR2_EL1[0] to 1 to force
PLDW/PFRM ST to behave like PLD/PRFM LD and not cause
invalidations to other PE caches.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2004089/latest
Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: I3b29f4b7f167bf499d5d11ffef91a94861bd1383
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 5d3c1f58905d3b7350e02c4687dceaf0971700b3 Tue Sep 06 10:23:25 UTC 2022 Akram Ahmad <Akram.Ahmad@arm.com> fix(cpus): workaround for Cortex-A78C erratum 2376749
Cortex-A78C erratum 2376749 is a Cat B erratum that applies
to revisions r0p1 and r0p2 of the A78C and is currently open.
The workaround is to set CPUACTLR2_EL1[0] to 1 to force
PLDW/PFRM ST to behave like PLD/PRFM LD and not cause
invalidations to other PE caches.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2004089/latest
Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com>
Change-Id: I3b29f4b7f167bf499d5d11ffef91a94861bd1383
|