Searched hist:"5436047 a0e1f32543042d6de9f1f6a3edcd47591" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/qemu/common/ |
| H A D | qemu_bl31_setup.c | 5436047a0e1f32543042d6de9f1f6a3edcd47591 Mon Apr 22 15:27:56 UTC 2024 Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> refactor(qemu): do not hardcode counter frequency
From QEMU change:
> In previous versions of the Arm architecture, the frequency of the
> generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
> and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
> In Armv8.6, the architecture standardized this frequency to 1GHz.
This change stops TF-A from hardcoding 62.5MHz frequency. Instead value
stored in CNTFRQ_EL0 would be used. As a result we get 62.5MHz on older
cores and 1GHz on newer ones.
Change-Id: I7d414ce6d3708e598bbb5a6f79eb2d4ec8e15ac4
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
|
| /rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/ |
| H A D | platform_def.h | 5436047a0e1f32543042d6de9f1f6a3edcd47591 Mon Apr 22 15:27:56 UTC 2024 Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> refactor(qemu): do not hardcode counter frequency
From QEMU change:
> In previous versions of the Arm architecture, the frequency of the
> generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
> and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
> In Armv8.6, the architecture standardized this frequency to 1GHz.
This change stops TF-A from hardcoding 62.5MHz frequency. Instead value
stored in CNTFRQ_EL0 would be used. As a result we get 62.5MHz on older
cores and 1GHz on newer ones.
Change-Id: I7d414ce6d3708e598bbb5a6f79eb2d4ec8e15ac4
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
|
| /rk3399_ARM-atf/plat/qemu/qemu/include/ |
| H A D | platform_def.h | 5436047a0e1f32543042d6de9f1f6a3edcd47591 Mon Apr 22 15:27:56 UTC 2024 Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org> refactor(qemu): do not hardcode counter frequency
From QEMU change:
> In previous versions of the Arm architecture, the frequency of the
> generic timers as reported in CNTFRQ_EL0 could be any IMPDEF value,
> and for QEMU we picked 62.5MHz, giving a timer tick period of 16ns.
> In Armv8.6, the architecture standardized this frequency to 1GHz.
This change stops TF-A from hardcoding 62.5MHz frequency. Instead value
stored in CNTFRQ_EL0 would be used. As a result we get 62.5MHz on older
cores and 1GHz on newer ones.
Change-Id: I7d414ce6d3708e598bbb5a6f79eb2d4ec8e15ac4
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
|