Searched hist:"53451898 a1f5f5f64b6c397b2b0dad0b2e7a091c" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/ |
| H A D | plat_sip_calls.c | 53451898a1f5f5f64b6c397b2b0dad0b2e7a091c Tue Jul 19 23:36:13 UTC 2016 Krishna Sitaraman <ksitaraman@nvidia.com> Tegra186: Add smc handler for coresight clock gating
This change adds function to invoke for MISC_CCPLEX ARI calls and
the corresponding smc handler. This can be used to enable/disable
Coresight clock gating.
Change-Id: I4bc17aa478a46c29bfe17fd74f839a383ee2b644
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| H A D | ari.c | 53451898a1f5f5f64b6c397b2b0dad0b2e7a091c Tue Jul 19 23:36:13 UTC 2016 Krishna Sitaraman <ksitaraman@nvidia.com> Tegra186: Add smc handler for coresight clock gating
This change adds function to invoke for MISC_CCPLEX ARI calls and
the corresponding smc handler. This can be used to enable/disable
Coresight clock gating.
Change-Id: I4bc17aa478a46c29bfe17fd74f839a383ee2b644
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|
| H A D | mce.c | 53451898a1f5f5f64b6c397b2b0dad0b2e7a091c Tue Jul 19 23:36:13 UTC 2016 Krishna Sitaraman <ksitaraman@nvidia.com> Tegra186: Add smc handler for coresight clock gating
This change adds function to invoke for MISC_CCPLEX ARI calls and
the corresponding smc handler. This can be used to enable/disable
Coresight clock gating.
Change-Id: I4bc17aa478a46c29bfe17fd74f839a383ee2b644
Signed-off-by: Krishna Sitaraman <ksitaraman@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
|