Home
last modified time | relevance | path

Searched hist:"4618 b2bfa7116371a5785a32f69ef2ea928f7cb7" (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dneoverse_n2.h4618b2bfa7116371a5785a32f69ef2ea928f7cb7 Wed Mar 31 15:10:27 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2025414

Neoverse N2 erratum 2025414 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUECLTR_EL1[8] to 1 which disables store issue prefetching.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ia1c63fb93a1bdb1c3f4cf019a197b2a59233885a
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dneoverse_n2.S4618b2bfa7116371a5785a32f69ef2ea928f7cb7 Wed Mar 31 15:10:27 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2025414

Neoverse N2 erratum 2025414 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUECLTR_EL1[8] to 1 which disables store issue prefetching.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ia1c63fb93a1bdb1c3f4cf019a197b2a59233885a
/rk3399_ARM-atf/docs/design/
H A Dcpu-specific-build-macros.rst4618b2bfa7116371a5785a32f69ef2ea928f7cb7 Wed Mar 31 15:10:27 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2025414

Neoverse N2 erratum 2025414 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUECLTR_EL1[8] to 1 which disables store issue prefetching.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ia1c63fb93a1bdb1c3f4cf019a197b2a59233885a
/rk3399_ARM-atf/lib/cpus/
H A Dcpu-ops.mk4618b2bfa7116371a5785a32f69ef2ea928f7cb7 Wed Mar 31 15:10:27 UTC 2021 Bipin Ravi <bipin.ravi@arm.com> errata: workaround for Neoverse N2 erratum 2025414

Neoverse N2 erratum 2025414 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUECLTR_EL1[8] to 1 which disables store issue prefetching.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ia1c63fb93a1bdb1c3f4cf019a197b2a59233885a