Searched hist:"2 d46b2e46189120b6779cd27ec6bd6ec9901f72c" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/plat/intel/soc/agilex5/include/ |
| H A D | socfpga_plat_def.h | 2d46b2e46189120b6779cd27ec6bd6ec9901f72c Wed Sep 27 03:02:45 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): increase bl2 size limit
There are several features included in BL2 causing the size getting
bigger for RELEASE mode. When build with DEBUG mode, the size will
be bigger thus causing BL2 image has exceeded its limits.
Change-Id: I7542f5ea001542450695d48e8126bcca8728d76a
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
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| /rk3399_ARM-atf/plat/intel/soc/stratix10/include/ |
| H A D | socfpga_plat_def.h | 2d46b2e46189120b6779cd27ec6bd6ec9901f72c Wed Sep 27 03:02:45 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): increase bl2 size limit
There are several features included in BL2 causing the size getting
bigger for RELEASE mode. When build with DEBUG mode, the size will
be bigger thus causing BL2 image has exceeded its limits.
Change-Id: I7542f5ea001542450695d48e8126bcca8728d76a
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
|
| /rk3399_ARM-atf/plat/intel/soc/agilex/include/ |
| H A D | socfpga_plat_def.h | 2d46b2e46189120b6779cd27ec6bd6ec9901f72c Wed Sep 27 03:02:45 UTC 2023 Jit Loon Lim <jit.loon.lim@intel.com> feat(intel): increase bl2 size limit
There are several features included in BL2 causing the size getting
bigger for RELEASE mode. When build with DEBUG mode, the size will
be bigger thus causing BL2 image has exceeded its limits.
Change-Id: I7542f5ea001542450695d48e8126bcca8728d76a
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
|