Searched hist:"12140908 a52230081f85069f0f0a400ddabf44ef" (Results 1 – 4 of 4) sorted by relevance
| /rk3399_ARM-atf/include/lib/cpus/aarch64/ |
| H A D | cortex_a720.h | 12140908a52230081f85069f0f0a400ddabf44ef Fri Jul 19 23:09:20 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2844092
Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[11] of CPUACTLR4_EL1 register.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421/latest
Change-Id: I3d8eacb26cba42774f1f31c3aae2a0e6fecec614
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a720.S | 12140908a52230081f85069f0f0a400ddabf44ef Fri Jul 19 23:09:20 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2844092
Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[11] of CPUACTLR4_EL1 register.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421/latest
Change-Id: I3d8eacb26cba42774f1f31c3aae2a0e6fecec614
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 12140908a52230081f85069f0f0a400ddabf44ef Fri Jul 19 23:09:20 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2844092
Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[11] of CPUACTLR4_EL1 register.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421/latest
Change-Id: I3d8eacb26cba42774f1f31c3aae2a0e6fecec614
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 12140908a52230081f85069f0f0a400ddabf44ef Fri Jul 19 23:09:20 UTC 2024 Sona Mathew <sonarebecca.mathew@arm.com> fix(cpus): workaround for Cortex-A720 erratum 2844092
Cortex-A720 erratum 2844092 is a Cat B erratum that is present
in revisions r0p0, r0p1 and is fixed in r0p2.
The workaround is to set bit[11] of CPUACTLR4_EL1 register.
SDEN documentation:
https://developer.arm.com/documentation/SDEN-2439421/latest
Change-Id: I3d8eacb26cba42774f1f31c3aae2a0e6fecec614
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
|