| /OK3568_Linux_fs/u-boot/arch/x86/lib/ |
| H A D | cmd_mtrr.c | 4 * SPDX-License-Identifier: GPL-2.0+ 25 printf("Reg Valid Write-type %-16s %-16s %-16s\n", "Base ||", in do_mtrr_list() 26 "Mask ||", "Size ||"); in do_mtrr_list() 29 uint64_t base, mask, size; in do_mtrr_list() local 30 bool valid; in do_mtrr_list() local 33 mask = native_read_msr(MTRR_PHYS_MASK_MSR(i)); in do_mtrr_list() 34 size = ~mask & ((1ULL << CONFIG_CPU_ADDR_BITS) - 1); in do_mtrr_list() 35 size |= (1 << 12) - 1; in do_mtrr_list() 37 valid = mask & MTRR_PHYS_MASK_VALID; in do_mtrr_list() 39 printf("%d %-5s %-12s %016llx %016llx %016llx\n", i, in do_mtrr_list() [all …]
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| /OK3568_Linux_fs/kernel/net/netlabel/ |
| H A D | netlabel_addrlist.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 10 * Author: Paul Moore <paul@paul-moore.com> 14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2008 27 * struct netlbl_af4list - NetLabel IPv4 address list 29 * @mask: IPv4 address mask 30 * @valid: valid flag 35 __be32 mask; member 37 u32 valid; member 42 * struct netlbl_af6list - NetLabel IPv6 address list 44 * @mask: IPv6 address mask [all …]
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| H A D | netlabel_addrlist.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 10 * Author: Paul Moore <paul@paul-moore.com> 14 * (c) Copyright Hewlett-Packard Development Company, L.P., 2008 36 * netlbl_af4list_search - Search for a matching IPv4 address entry 52 if (iter->valid && (addr & iter->mask) == iter->addr) in netlbl_af4list_search() 59 * netlbl_af4list_search_exact - Search for an exact IPv4 address entry 61 * @mask: IPv4 address mask 71 __be32 mask, in netlbl_af4list_search_exact() argument 77 if (iter->valid && iter->addr == addr && iter->mask == mask) in netlbl_af4list_search_exact() 86 * netlbl_af6list_search - Search for a matching IPv6 address entry [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/apm/xgene/ |
| H A D | xgene_enet_cle.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* Applied Micro X-Gene SoC Ethernet Classifier structures 27 if (pdata->enet_id == XGENE_ENET1) { in xgene_cle_idt_to_hw() 41 buf[0] = SET_VAL(CLE_DROP, dbptr->drop); in xgene_cle_dbptr_to_hw() 42 buf[4] = SET_VAL(CLE_FPSEL, dbptr->fpsel) | in xgene_cle_dbptr_to_hw() 43 SET_VAL(CLE_NFPSEL, dbptr->nxtfpsel) | in xgene_cle_dbptr_to_hw() 44 SET_VAL(CLE_DSTQIDL, dbptr->dstqid); in xgene_cle_dbptr_to_hw() 46 buf[5] = SET_VAL(CLE_DSTQIDH, (u32)dbptr->dstqid >> CLE_DSTQIDL_LEN) | in xgene_cle_dbptr_to_hw() 47 SET_VAL(CLE_PRIORITY, dbptr->cle_priority); in xgene_cle_dbptr_to_hw() 55 buf[j++] = SET_VAL(CLE_TYPE, kn->node_type); in xgene_cle_kn_to_hw() [all …]
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 4 * SPDX-License-Identifier: GPL-2.0+ 11 #include <asm/arch/imx-regs.h> 25 reg = readl(&scg1_regs->sosccsr); in scg_src_get_rate() 31 reg = readl(&scg1_regs->firccsr); in scg_src_get_rate() 37 reg = readl(&scg1_regs->sirccsr); in scg_src_get_rate() 43 reg = readl(&scg1_regs->rtccsr); in scg_src_get_rate() 58 u32 shift, mask; in scg_sircdiv_get_rate() local 62 mask = SCG_SIRCDIV_DIV1_MASK; in scg_sircdiv_get_rate() 66 mask = SCG_SIRCDIV_DIV2_MASK; in scg_sircdiv_get_rate() 70 mask = SCG_SIRCDIV_DIV3_MASK; in scg_sircdiv_get_rate() [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | arm,vic.txt | 5 nested or have the outputs wire-OR'd together. 9 - compatible : should be one of 10 "arm,pl190-vic" 11 "arm,pl192-vic" 12 - interrupt-controller : Identifies the node as an interrupt controller 13 - #interrupt-cells : The number of cells to define the interrupts. Must be 1 as 16 - reg : The register bank for the VIC. 20 - interrupts : Interrupt source for parent controllers if the VIC is nested. 21 - valid-mask : A one cell big bit mask of valid interrupt sources. Each bit 24 clear means otherwise. If unspecified, defaults to all valid. [all …]
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| H A D | arm,versatile-fpga-irq.txt | 9 - compatible: "arm,versatile-fpga-irq" or "oxsemi,ox810se-rps-irq" 10 - interrupt-controller: Identifies the node as an interrupt controller 11 - #interrupt-cells: The number of cells to define the interrupts. Must be 1 14 - reg: The register bank for the FPGA interrupt controller. 15 - clear-mask: a u32 number representing the mask written to clear all IRQs 17 - valid-mask: a u32 number representing a bit mask determining which of 18 the interrupts are valid. Unconnected/unused lines are set to 0, and 25 compatible = "arm,versatile-fpga-irq"; 26 #interrupt-cells = <1>; 27 interrupt-controller; [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| H A D | macsec_struct.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 21 /*! The match mask is per-nibble. 0 means don't care, i.e. every value 68 /*! This is to specify the 40bit SNAP header if the SNAP header's mask 72 /*! This is to specify the 24bit LLC header if the LLC header's mask is 122 /*! Mask is per-byte. 132 * 1: enable comparison of extracted VLAN Valid field. 135 /*! This is bit mask to enable comparison the 8 bit TCI field, 142 /*! Mask is per-byte. 151 /*! Mask is per-byte. 156 /*! Mask is per-byte. [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/backend/gpu/ |
| H A D | mali_kbase_pm_ca.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * (C) COPYRIGHT 2011-2018, 2020-2021 ARM Limited. All rights reserved. 18 * http://www.gnu.org/licenses/gpl-2.0.html. 30 * kbase_pm_ca_init - Initialize core availability framework 32 * @kbdev: The kbase device structure for the device (must be a valid pointer) 37 * -errno otherwise 42 * kbase_pm_ca_term - Terminate core availability framework 44 * @kbdev: The kbase device structure for the device (must be a valid pointer) 49 * kbase_pm_ca_get_core_mask - Get currently available shaders core mask 51 * @kbdev: The kbase device structure for the device (must be a valid pointer) [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ipa/ |
| H A D | ipa_smp2p.c | 1 // SPDX-License-Identifier: GPL-2.0 3 /* Copyright (c) 2012-2018, The Linux Foundation. All rights reserved. 4 * Copyright (C) 2019-2020 Linaro Ltd. 34 * whether the clock is enabled using two SMP2P state bits--one to 36 * clock state bit is valid. The modem will poll the valid bit until it 44 * struct ipa_smp2p - IPA SMP2P information 46 * @valid_state: SMEM state indicating enabled state is valid 48 * @valid_bit: Valid bit in 32-bit SMEM state mask 49 * @enabled_bit: Enabled bit in 32-bit SMEM state mask 50 * @enabled_bit: Enabled bit in 32-bit SMEM state mask [all …]
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| /OK3568_Linux_fs/kernel/drivers/irqchip/ |
| H A D | irq-versatile-fpga.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Support for Versatile FPGA-based IRQ controllers 10 #include <linux/irqchip/versatile-fpga.h> 35 * struct fpga_irq_data - irq data container for the FPGA IRQ controller 39 * @valid: mask for valid IRQs on this controller 45 u32 valid; member 57 u32 mask = 1 << d->hwirq; in fpga_irq_mask() local 59 writel(mask, f->base + IRQ_ENABLE_CLEAR); in fpga_irq_mask() 65 u32 mask = 1 << d->hwirq; in fpga_irq_unmask() local 67 writel(mask, f->base + IRQ_ENABLE_SET); in fpga_irq_unmask() [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/bifrost/ |
| H A D | mali_kbase_hwaccess_pm.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * (C) COPYRIGHT 2014-2015, 2018-2022 ARM Limited. All rights reserved. 18 * http://www.gnu.org/licenses/gpl-2.0.html. 34 /* Forward definition - see mali_kbase.h */ 40 * kbase_hwaccess_pm_init - Initialize the power management framework. 42 * @kbdev: The kbase device structure for the device (must be a valid pointer) 51 * kbase_hwaccess_pm_term - Terminate the power management framework. 53 * @kbdev: The kbase device structure for the device (must be a valid pointer) 60 * kbase_hwaccess_pm_powerup - Power up the GPU. 61 * @kbdev: The kbase device structure for the device (must be a valid pointer) [all …]
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| /OK3568_Linux_fs/kernel/drivers/net/ethernet/pensando/ionic/ |
| H A D | ionic_regs.h | 1 /* SPDX-License-Identifier: (GPL-2.0 OR Linux-OpenIB) OR BSD-2-Clause */ 2 /* Copyright (c) 2018-2019 Pensando Systems, Inc. All rights reserved. */ 9 /** struct ionic_intr - interrupt control register set. 11 * @mask: interrupt mask value. 13 * @mask_assert: interrupt mask value on assert. 18 u32 mask; member 28 /** enum ionic_intr_mask_vals - valid values for mask and mask_assert. 30 * @IONIC_INTR_MASK_SET: mask interrupt. 37 /** enum ionic_intr_credits_bits - bitwise composition of credits values. 38 * @IONIC_INTR_CRED_COUNT: bit mask of credit count, no shift needed. [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/backend/gpu/ |
| H A D | mali_kbase_pm_ca.h | 3 * (C) COPYRIGHT 2011-2015 ARM Limited. All rights reserved. 12 * Boston, MA 02110-1301, USA. 26 * kbase_pm_ca_init - Initialize core availability framework 30 * @kbdev: The kbase device structure for the device (must be a valid pointer) 33 * -errno otherwise 38 * kbase_pm_ca_term - Terminate core availability framework 40 * @kbdev: The kbase device structure for the device (must be a valid pointer) 45 * kbase_pm_ca_get_core_mask - Get currently available shaders core mask 47 * @kbdev: The kbase device structure for the device (must be a valid pointer) 49 * Returns a mask of the currently available shader cores. [all …]
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| H A D | mali_kbase_pm_defs.h | 3 * (C) COPYRIGHT 2014-2017 ARM Limited. All rights reserved. 12 * Boston, MA 02110-1301, USA. 19 * Backend-specific Power Manager definitions 39 /* Forward definition - see mali_kbase.h */ 44 * enum kbase_pm_core_type - The types of core in a GPU. 47 * - kbase_pm_get_present_cores() 48 * - kbase_pm_get_active_cores() 49 * - kbase_pm_get_trans_cores() 50 * - kbase_pm_get_ready_cores(). 69 * struct kbasep_pm_metrics_data - Metrics data collected for use by the power [all …]
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| /OK3568_Linux_fs/kernel/include/linux/ |
| H A D | regmap.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 49 * struct reg_default - Default value for a register. 63 * struct reg_sequence - An individual write from a sequence of writes. 86 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs 93 * tight-loops). Should be less than ~20ms since usleep_range 94 * is used (see Documentation/timers/timers-howto.rst). 97 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read 113 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs 119 * @delay_us: Time to udelay between reads in us (0 tight-loops). 121 * (see Documentation/timers/timers-howto.rst). [all …]
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| /OK3568_Linux_fs/external/xserver/test/xi2/ |
| H A D | protocol-xigetselectedevents.c | 25 #include <dix-config.h> 33 * Zero-length masks if no masks are set. 34 * Valid masks for valid devices. 35 * Masks set on non-existent devices are not returned. 50 #include "protocol-common.h" 59 unsigned char mask[MAXDEVICES][XI2LASTEVENT]; /* intentionally bigger */ member 77 if (client->swapped) { in reply_XIGetSelectedEvents() 78 swapl(&rep->length); in reply_XIGetSelectedEvents() 79 swaps(&rep->sequenceNumber); in reply_XIGetSelectedEvents() 80 swaps(&rep->num_masks); in reply_XIGetSelectedEvents() [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/mach-pxa/ |
| H A D | mfp-pxa2xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/arch/arm/mach-pxa/mfp-pxa2xx.c 13 #include <linux/gpio-pxa.h> 20 #include <mach/pxa2xx-regs.h> 21 #include "mfp-pxa2xx.h" 30 #define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 39 unsigned valid : 1; member 43 unsigned int mask; /* bit mask in PWER or PKWR */ member 44 unsigned int mux_mask; /* bit mask of muxed gpio bits, 0 if no mux */ 54 unsigned long gafr, mask = GPIO_bit(gpio); in __mfp_config_gpio() local [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | s3c6400.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 23 valid-mask = <0xfffffe1f>; 24 valid-wakeup-mask = <0x00200004>; 28 valid-mask = <0xffffffff>; 29 valid-wakeup-mask = <0x53020000>; 33 clocks: clock-controller@7e00f000 { 34 compatible = "samsung,s3c6400-clock"; 36 #clock-cells = <1>;
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| H A D | s3c6410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 27 valid-mask = <0xffffff7f>; 28 valid-wakeup-mask = <0x00200004>; 32 valid-mask = <0xffffffff>; 33 valid-wakeup-mask = <0x53020000>; 37 clocks: clock-controller@7e00f000 { 38 compatible = "samsung,s3c6410-clock"; 40 #clock-cells = <1>; 44 compatible = "samsung,s3c2440-i2c"; 46 interrupt-parent = <&vic0>; [all …]
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| /OK3568_Linux_fs/external/mpp/mpp/hal/common/ |
| H A D | hal_bufs.c | 2 * Copyright 2015 - 2017 Rockchip Electronics Co. LTD 8 * http://www.apache.org/licenses/LICENSE-2.0 49 RK_U32 valid; member 58 RK_S32 elem_size = impl->elem_size; in hal_bufs_pos() 60 return (HalBuf *)(impl->bufs + idx * elem_size); in hal_bufs_pos() 67 if (impl->valid && impl->size_sum) { in hal_bufs_clear() 70 for (i = 0; i < impl->max_cnt; i++) { in hal_bufs_clear() 71 RK_U32 mask = 1 << i; in hal_bufs_clear() local 73 if (impl->valid & mask) { in hal_bufs_clear() 77 for (j = 0; j < impl->size_cnt; j++) { in hal_bufs_clear() [all …]
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| /OK3568_Linux_fs/kernel/drivers/gpu/arm/midgard/ |
| H A D | mali_kbase_hwaccess_pm.h | 3 * (C) COPYRIGHT 2014-2015 ARM Limited. All rights reserved. 12 * Boston, MA 02110-1301, USA. 32 /* Forward definition - see mali_kbase.h */ 42 * @param kbdev The kbase device structure for the device (must be a valid 56 * @param kbdev The kbase device structure for the device (must be a valid 62 * kbase_hwaccess_pm_powerup - Power up the GPU. 63 * @kbdev: The kbase device structure for the device (must be a valid pointer) 82 * @param kbdev The kbase device structure for the device (must be a valid 88 * Perform any backend-specific actions to suspend the GPU 90 * @param kbdev The kbase device structure for the device (must be a valid [all …]
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| /OK3568_Linux_fs/u-boot/drivers/phy/marvell/ |
| H A D | comphy_mux.c | 2 * Copyright (C) 2015-2016 Marvell International Ltd. 4 * SPDX-License-Identifier: GPL-2.0+ 16 * is valid for specific lane. If the type is not valid, 24 int lane, opt, valid; in comphy_mux_check_config() local 31 if (comphy_map_data->type == PHY_TYPE_IGNORE) in comphy_mux_check_config() 34 mux_opt = mux_data->mux_values; in comphy_mux_check_config() 35 for (opt = 0, valid = 0; opt < mux_data->max_lane_values; in comphy_mux_check_config() 37 if (mux_opt->type == comphy_map_data->type) { in comphy_mux_check_config() 38 valid = 1; in comphy_mux_check_config() 42 if (valid == 0) { in comphy_mux_check_config() [all …]
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| /OK3568_Linux_fs/u-boot/cmd/ddr_tool/stressapptest/ |
| H A D | stressapptest.c | 6 * http://www.apache.org/licenses/LICENSE-2.0 15 /* This is stressapptest for Rockchip platform in U-Boot, the design idea and 61 ARRAY_SIZE(walking_1_data) - 1, /* mask */ 75 ARRAY_SIZE(walking_1_x16_data) - 1, /* mask */ 94 ARRAY_SIZE(walking_1_x16_repeat_data) - 1, /* mask */ 137 ARRAY_SIZE(walking_inv_1_data) - 1, /* mask */ 155 ARRAY_SIZE(walking_inv_1_x16_data) - 1, /* mask */ 181 ARRAY_SIZE(walking_inv_1_x16_repeat_data) - 1, /* mask */ 207 ARRAY_SIZE(walking_0_data) - 1, /* mask */ 216 ARRAY_SIZE(one_zero_data) - 1, /* mask */ [all …]
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| /OK3568_Linux_fs/u-boot/include/ |
| H A D | fsl_tgec.h | 2 * Copyright 2009-2011 Freescale Semiconductor, Inc. 5 * SPDX-License-Identifier: GPL-2.0+ 18 u32 mac_addr_0; /* Lower 32 bits of 48-bit MAC address */ 19 u32 mac_addr_1; /* Upper 16 bits of 48-bit MAC address */ 26 u32 tx_ipg_length; /* Transmitter inter-packet-gap register */ 27 u32 mac_addr_2; /* Lower 32 bits of the 2nd 48-bit MAC addr */ 28 u32 mac_addr_3; /* Upper 16 bits of the 2nd 48-bit MAC addr */ 30 u32 imask; /* Interrupt mask register */ 42 u32 tx_pause_frame_u; /* Tx valid pause frame upper */ 43 u32 tx_pause_frame_l; /* Tx valid pause frame lower */ [all …]
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