Searched +full:sun8i +full:- +full:a23 +full:- +full:axi +full:- +full:clk (Results 1 – 8 of 8) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-axi-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A10 AXI Clock Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 "#clock-cells":21 - allwinner,sun4i-a10-axi-clk22 - allwinner,sun8i-a23-axi-clk[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-gates-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 "#clock-cells":24 - const: allwinner,sun4i-a10-gates-clk25 - const: allwinner,sun4i-a10-axi-gates-clk26 - const: allwinner,sun4i-a10-ahb-gates-clk[all …]
2 * Copyright 2014 Chen-Yu Tsai4 * Chen-Yu Tsai <wens@csie.org>6 * This file is dual-licensed: you can use it either under the terms47 #include <dt-bindings/interrupt-controller/arm-gic.h>49 #include <dt-bindings/pinctrl/sun4i-a10.h>52 interrupt-parent = <&gic>;55 #address-cells = <1>;56 #size-cells = <1>;60 compatible = "allwinner,simple-framebuffer",61 "simple-framebuffer";[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later5 * Maxime Ripard <maxime.ripard@free-electrons.com>8 #include <linux/clk.h>9 #include <linux/clk-provider.h>43 number = of_property_count_u32_elems(node, "clock-indices"); in sunxi_simple_gates_setup()44 of_property_read_u32_index(node, "clock-indices", number - 1, &number); in sunxi_simple_gates_setup()46 clk_data->clks = kcalloc(number + 1, sizeof(struct clk *), GFP_KERNEL); in sunxi_simple_gates_setup()47 if (!clk_data->clks) in sunxi_simple_gates_setup()50 of_property_for_each_u32(node, "clock-indices", prop, p, index) { in sunxi_simple_gates_setup()51 of_property_read_string_index(node, "clock-output-names", in sunxi_simple_gates_setup()[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later8 #include <linux/clk.h>9 #include <linux/clk-provider.h>14 #include <linux/reset-controller.h>19 #include "clk-factors.h"27 * sun4i_get_pll1_factors() - calculates n, k, m, p factors for PLL138 div = req->rate / 6000000; in sun4i_get_pll1_factors()39 req->rate = 6000000 * div; in sun4i_get_pll1_factors()42 req->m = 0; in sun4i_get_pll1_factors()45 if (req->rate >= 768000000 || req->rate == 42000000 || in sun4i_get_pll1_factors()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 #include <linux/clk-provider.h>24 #include "ccu-sun8i-a23-a33.h"38 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",49 * With sigma-delta modulation for fractional-N on the audio PLL,63 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",73 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",85 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",97 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr_clk, "pll-ddr",106 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 #include <linux/clk-provider.h>23 #include "ccu-sun8i-a23-a33.h"36 .hw.init = CLK_HW_INIT("pll-cpux", "osc24M",47 * With sigma-delta modulation for fractional-N on the audio PLL,61 static SUNXI_CCU_NM_WITH_SDM_GATE_LOCK(pll_audio_base_clk, "pll-audio-base",71 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_video_clk, "pll-video",83 static SUNXI_CCU_NM_WITH_FRAC_GATE_LOCK(pll_ve_clk, "pll-ve",95 static SUNXI_CCU_NKM_WITH_GATE_LOCK(pll_ddr0_clk, "pll-ddr0",104 static SUNXI_CCU_NK_WITH_GATE_LOCK_POSTDIV(pll_periph_clk, "pll-periph",[all …]
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