Searched +full:socfpga +full:- +full:denali +full:- +full:nand (Results 1 – 9 of 9) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/mtd/denali,nand.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Denali NAND controller10 - Masahiro Yamada <yamada.masahiro@socionext.com>15 - altr,socfpga-denali-nand16 - socionext,uniphier-denali-nand-v5a17 - socionext,uniphier-denali-nand-v5b19 reg-names:[all …]
5 * SPDX-License-Identifier: GPL-2.0+14 #include "denali.h"48 .compatible = "altr,socfpga-denali-nand",52 .compatible = "socionext,uniphier-denali-nand-v5a",56 .compatible = "socionext,uniphier-denali-nand-v5b",64 struct denali_nand_info *denali = dev_get_priv(dev); in denali_dt_probe() local72 denali->revision = data->revision; in denali_dt_probe()73 denali->caps = data->caps; in denali_dt_probe()74 denali->ecc_caps = data->ecc_caps; in denali_dt_probe()77 denali->dev = dev; in denali_dt_probe()[all …]
1 // SPDX-License-Identifier: GPL-2.03 * NAND Flash Controller Device Driver for DT20 #include "denali.h"67 .compatible = "altr,socfpga-denali-nand",71 .compatible = "socionext,uniphier-denali-nand-v5a",75 .compatible = "socionext,uniphier-denali-nand-v5b",82 static int denali_dt_chip_init(struct denali_controller *denali, in denali_dt_chip_init() argument93 dchip = devm_kzalloc(denali->dev, struct_size(dchip, sels, nsels), in denali_dt_chip_init()96 return -ENOMEM; in denali_dt_chip_init()98 dchip->nsels = nsels; in denali_dt_chip_init()[all …]
1 // SPDX-License-Identifier: GPL-2.06 /dts-v1/;7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/clock/agilex-clock.h>12 compatible = "intel,socfpga-agilex";13 #address-cells = <2>;14 #size-cells = <2>;16 reserved-memory {17 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only6 /dts-v1/;7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>8 #include <dt-bindings/gpio/gpio.h>9 #include <dt-bindings/clock/stratix10-clock.h>12 compatible = "altr,socfpga-stratix10";13 #address-cells = <2>;14 #size-cells = <2>;16 reserved-memory {17 #address-cells = <2>;[all …]
1 // SPDX-License-Identifier: GPL-2.06 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>10 #address-cells = <1>;11 #size-cells = <1>;14 #address-cells = <1>;15 #size-cells = <0>;16 enable-method = "altr,socfpga-a10-smp";19 compatible = "arm,cortex-a9";22 next-level-cache = <&L2>;[all …]
1 // SPDX-License-Identifier: GPL-2.0+6 #include <dt-bindings/reset/altr,rst-mgr.h>9 #address-cells = <1>;10 #size-cells = <1>;22 #address-cells = <1>;23 #size-cells = <0>;24 enable-method = "altr,socfpga-smp";27 compatible = "arm,cortex-a9";30 next-level-cache = <&L2>;33 compatible = "arm,cortex-a9";[all …]
... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
9 -------------------------30 ``diff -u`` to make the patch easy to merge. Be prepared to get your40 See Documentation/process/coding-style.rst for guidance here.46 See Documentation/process/submitting-patches.rst for details.57 include a Signed-off-by: line. The current version of this59 Documentation/process/submitting-patches.rst.70 that the bug would present a short-term risk to other users if it76 Documentation/admin-guide/security-bugs.rst for details.81 ---------------------------------------------------97 W: *Web-page* with status/info[all …]