Home
last modified time | relevance | path

Searched +full:reserved +full:- +full:channels (Results 1 – 25 of 1020) sorted by relevance

12345678910>>...41

/OK3568_Linux_fs/kernel/drivers/net/wireless/intel/iwlwifi/fw/api/
H A Dscan.h8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(c) 2018 - 2020 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(c) 2018 - 2020 Intel Corporation
35 * All rights reserved.
[all …]
H A Dnvm-reg.h8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
9 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
10 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
11 * Copyright(C) 2018 - 2020 Intel Corporation
27 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
31 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
32 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
33 * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
34 * Copyright(C) 2018 - 2020 Intel Corporation
35 * All rights reserved.
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/
H A Dingenic,dma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: "dma-controller.yaml#"
18 - ingenic,jz4740-dma
19 - ingenic,jz4725b-dma
20 - ingenic,jz4770-dma
21 - ingenic,jz4780-dma
22 - ingenic,x1000-dma
[all …]
H A Dti-edma.txt8 ------------------------------------------------------------------------------
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
20 - reg: Memory map of eDMA CC
21 - reg-names: "edma3_cc"
22 - interrupts: Interrupt lines for CCINT, MPERR and CCERRINT.
23 - interrupt-names: "edma3_ccint", "edma3_mperr" and "edma3_ccerrint"
[all …]
H A Ddma-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
20 "#dma-cells":
27 dma-channel-mask:
29 Bitmask of available DMA channels in ascending order that are
30 not reserved by firmware and are available to the
32 The first item in the array is for channels 0-31, the second is for
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/iio/adc/
H A Dcosmic,10001-adc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cosmic Circuits CC-10001 ADC
10 - Jonathan Cameron <jic23@kernel.org>
13 Cosmic Circuits 10001 10-bit ADC device.
17 const: cosmic,10001-adc
22 adc-reserved-channels:
25 Bitmask of reserved channels, i.e. channels that cannot be
[all …]
/OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/OpenCV-android-sdk/sdk/native/jni/include/opencv2/core/
H A Dtraits.hpp13 // Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
14 // Copyright (C) 2009, Willow Garage Inc., all rights reserved.
15 // Copyright (C) 2013, OpenCV Foundation, all rights reserved.
64 form CV_\<bit-depth\>{U|S|F}C(\<number_of_channels\>), for example: uchar \~ CV_8UC1, 3-element
65 floating-point tuple \~ CV_32FC3, and so on. A universal OpenCV structure that is able to store a
80 enum { channel_type = CV_8U, channels = 1, fmt='u', type = CV_8U };
89 enum { depth = DataDepth<_Tp>::value, channels=2,
90 fmt=(channels-1)*256+DataDepth<_Tp>::fmt,
91 type=CV_MAKETYPE(depth, channels) };
95 The main purpose of this class is to convert compilation-time type information to an
[all …]
/OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/opencv-linux-armhf/include/opencv2/core/
H A Dtraits.hpp13 // Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
14 // Copyright (C) 2009, Willow Garage Inc., all rights reserved.
15 // Copyright (C) 2013, OpenCV Foundation, all rights reserved.
64 form CV_\<bit-depth\>{U|S|F}C(\<number_of_channels\>), for example: uchar \~ CV_8UC1, 3-element
65 floating-point tuple \~ CV_32FC3, and so on. A universal OpenCV structure that is able to store a
80 enum { channel_type = CV_8U, channels = 1, fmt='u', type = CV_8U };
89 enum { depth = DataDepth<_Tp>::value, channels=2,
90 fmt=(channels-1)*256+DataDepth<_Tp>::fmt,
91 type=CV_MAKETYPE(depth, channels) };
95 The main purpose of this class is to convert compilation-time type information to an
[all …]
/OK3568_Linux_fs/external/rknpu2/examples/3rdparty/opencv/opencv-linux-aarch64/include/opencv2/core/
H A Dtraits.hpp13 // Copyright (C) 2000-2008, Intel Corporation, all rights reserved.
14 // Copyright (C) 2009, Willow Garage Inc., all rights reserved.
15 // Copyright (C) 2013, OpenCV Foundation, all rights reserved.
64 form CV_\<bit-depth\>{U|S|F}C(\<number_of_channels\>), for example: uchar \~ CV_8UC1, 3-element
65 floating-point tuple \~ CV_32FC3, and so on. A universal OpenCV structure that is able to store a
80 enum { channel_type = CV_8U, channels = 1, fmt='u', type = CV_8U };
89 enum { depth = DataDepth<_Tp>::value, channels=2,
90 fmt=(channels-1)*256+DataDepth<_Tp>::fmt,
91 type=CV_MAKETYPE(depth, channels) };
95 The main purpose of this class is to convert compilation-time type information to an
[all …]
/OK3568_Linux_fs/kernel/drivers/staging/comedi/drivers/
H A Damplc_dio200.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
9 * COMEDI - Linux Control and Measurement Device Interface
24 * [0] - I/O port base address
25 * [1] - IRQ (optional, but commands won't work without it)
32 * ------------- ------------- -------------
34 * 0 PPI-X PPI-X PPI-X
35 * 1 CTR-Y1 PPI-Y PPI-Y
36 * 2 CTR-Y2 CTR-Z1* CTR-Z1
37 * 3 CTR-Z1 INTERRUPT* CTR-Z2
[all …]
H A Damplc_dio200_pci.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
8 * COMEDI - Linux Control and Measurement Device Interface
30 * ------------- ------------- -------------
32 * 0 PPI-X PPI-X PPI-X
33 * 1 PPI-Y UNUSED UNUSED
34 * 2 CTR-Z1 PPI-Y UNUSED
35 * 3 CTR-Z2 UNUSED UNUSED
36 * 4 INTERRUPT CTR-Z1 CTR-Z1
37 * 5 CTR-Z2 CTR-Z2
[all …]
/OK3568_Linux_fs/kernel/Documentation/userspace-api/media/v4l/
H A Dvidioc-g-modulator.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
39 ``index`` field and zero out the ``reserved`` array of a struct
49 initialize the ``index`` and ``txsubchans`` fields and the ``reserved``
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
[all …]
/OK3568_Linux_fs/kernel/drivers/interconnect/qcom/
H A Dicc-rpmh.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
9 #include <dt-bindings/interconnect/qcom,icc.h>
15 * struct qcom_icc_provider - Qualcomm specific interconnect provider
31 * struct bcm_db - Auxiliary data pertaining to each Bus Clock Manager (BCM)
35 * @reserved: reserved field
41 u8 reserved; member
50 * struct qcom_icc_node - Qualcomm specific interconnect nodes
55 * @channels: num of channels at this node
67 u16 channels; member
[all …]
/OK3568_Linux_fs/kernel/include/xen/interface/io/
H A Dsndif.h4 * Unified sound-device I/O interface for Xen guest OSes.
24 * Copyright (C) 2013-2015 GlobalLogic Inc.
25 * Copyright (C) 2016-2017 EPAM Systems Inc.
51 * Front->back notifications: when enqueuing a new request, sending a
53 * hold-off mechanism provided by the ring macros). Backends must set
56 * Back->front notifications: when enqueuing a new response, sending a
58 * hold-off mechanism provided by the ring macros). Frontends must set
61 * The two halves of a para-virtual sound card driver utilize nodes within
75 * Note: depending on the use-case backend can expose more sound cards and
77 * SW mixers, configuring virtual sound streams, channels etc.
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/mvl88w8977/mlinux/
H A Dmlan_ieee.h6 * Copyright (C) 2008-2017, Marvell International Ltd.
13 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
14 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
16 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
146 /** IE Max - size of previous fields */
147 t_u8 data[IEEE_MAX_IE_SIZE - sizeof(IEEEtypes_VendorHeader_t)];
154 /** IE Max - size of previous fields */
155 t_u8 data[IEEE_MAX_IE_SIZE - sizeof(IEEEtypes_Header_t)];
161 /** Reserved */
162 t_u8 reserved:6;
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/mvl88w8977/mlan/
H A Dmlan_ieee.h6 * Copyright (C) 2008-2017, Marvell International Ltd.
13 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
14 * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
16 * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
146 /** IE Max - size of previous fields */
147 t_u8 data[IEEE_MAX_IE_SIZE - sizeof(IEEEtypes_VendorHeader_t)];
154 /** IE Max - size of previous fields */
155 t_u8 data[IEEE_MAX_IE_SIZE - sizeof(IEEEtypes_Header_t)];
161 /** Reserved */
162 t_u8 reserved:6;
[all …]
/OK3568_Linux_fs/kernel/drivers/edac/
H A Di3000_edac.c25 /* Intel 3000 register addresses - device 0 function 0 - DRAM Controller */
33 * 7:1 reserved
39 * 6:1 reserved
54 deap |= (edeap & 1) << (32 - PAGE_SHIFT); in deap_pfn()
60 return deap & ~(I3000_DEAP_GRAIN - 1) & ~PAGE_MASK; in deap_offset()
75 * 15:12 reserved
78 * 10 reserved
79 * 9 LOCK to non-DRAM Memory Flag (LCKF)
81 * 7:2 reserved
82 * 1 Multi-bit DRAM ECC Error Flag (DMERR)
[all …]
H A Di82975x_edac.c34 /* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */
37 * 31:7 128 byte cache-line address
38 * 6:1 reserved
49 * 1h:7h reserved
50 * More - See Page 65 of Intel DocSheet.
55 * 15:12 reserved
57 * 10 reserved
58 * 9 non-DRAM lock error (ndlock)
60 * 7:2 reserved
73 * 15:12 reserved
[all …]
/OK3568_Linux_fs/kernel/Documentation/driver-api/rapidio/
H A Dtsi721.rst2 RapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
10 doorbells, inbound maintenance port-writes and RapidIO messaging.
13 channels. This mechanism provides access to larger range of hop counts and
16 RapidIO messaging support uses dedicated messaging channels for each mailbox.
23 - 'dbg_level'
24 - This parameter allows to control amount of debug information
32 - 'dma_desc_per_channel'
33 - This parameter defines number of hardware buffer
37 - 'dma_txqueue_sz'
38 - DMA transactions queue size. Defines number of pending
[all …]
/OK3568_Linux_fs/u-boot/arch/powerpc/include/asm/
H A Dimmap_8xx.h10 * functional files.....but anyone else is welcome to try. -- Dan
144 char res[0x74]; /* Reserved area */
174 /* The key to unlock registers maintained by keep-alive power.
277 typedef struct scc { /* Serial communication channels */
292 typedef struct smc { /* Serial management channels */
309 ushort res1; /* reserved */
310 uint fec_hash_table_high; /* upper 32-bits of hash table */
311 uint fec_hash_table_low; /* lower 32-bits of hash table */
315 uint res2[9]; /* reserved */
322 uint res3[10]; /* reserved */
[all …]
/OK3568_Linux_fs/buildroot/dl/sox/git/src/
H A Dmaud.c3 * supports: mono and stereo, linear, a-law and u-law reading and writing
7 * Copyright 1998-2006 Chris Bagwell and SoX Contributors
36 priv_t * p = (priv_t *) ft->priv; in startread()
90 lsx_readdw(ft, &(p->nsamples)); in startread()
106 ft->signal.rate = nom / denom; in startread()
111 ft->signal.channels = 1; in startread()
114 ft->signal.channels = 2; in startread()
117 … lsx_fail_errno(ft,SOX_EFMT,"MAUD: unsupported number of channels in file"); in startread()
121 lsx_readw(ft, &chaninf); /* number of channels (mono: 1, stereo: 2, ...) */ in startread()
122 if (chaninf != ft->signal.channels) in startread()
[all …]
H A Davr.c16 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
30 char name [8]; /* null-padded sample name */
44 unsigned short res1; /* Reserved, MIDI keyboard split */
45 unsigned short res2; /* Reserved, sample compression */
46 unsigned short res3; /* Reserved */
65 priv_t * avr = (priv_t *)ft->priv; in startread()
68 lsx_reads(ft, avr->magic, (size_t)4); in startread()
70 if (strncmp (avr->magic, AVR_MAGIC, (size_t)4)) { in startread()
75 lsx_readbuf(ft, avr->name, sizeof(avr->name)); in startread()
77 lsx_readw (ft, &(avr->mono)); in startread()
[all …]
/OK3568_Linux_fs/kernel/include/linux/
H A Dhyperv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
27 #include <asm/hyperv-tlfs.h>
48 * gva: |-- 64k --|-- 64k --| ... |
59 * gva: |-- 64k --|-- 64k --| ... |-- 64k --|-- 64k --| ... |
69 * index: 0 1 2 ... 16 ... n-15 n-14 n-13 ... 2n-30
76 /* Single-page buffer */
83 /* Multiple-page buffer */
92 * Multiple-page buffer array; the pfn array is variable size:
123 * WS2012/Win8 and later versions of Hyper-V implement interrupt
125 * is set by the host on the host->guest ring buffer, and by the
[all …]
/OK3568_Linux_fs/kernel/sound/soc/amd/
H A Dacp.h1 /* SPDX-License-Identifier: GPL-2.0 */
72 /* Playback DMA channels */
76 /* Capture DMA channels */
80 /* Playback DMA Channels for I2S BT instance */
84 /* Capture DMA Channels for I2S BT Instance */
203 /* Reserved for future use */
204 u32 reserved; member
/OK3568_Linux_fs/kernel/include/sound/sof/
H A Ddai-intel.h1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
6 * Copyright(c) 2018 Intel Corporation. All rights reserved.
52 /* DMIC max. four controllers for eight microphone channels */
55 /* SSP Configuration Request - SOF_IPC_DAI_SSP_CONFIG */
87 /* HDA Configuration Request - SOF_IPC_DAI_HDA_CONFIG */
92 uint32_t channels; member
95 /* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
100 uint32_t channels; member
102 /* reserved for future use */
103 uint32_t reserved[13]; member
[all …]

12345678910>>...41