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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pci/
H A Dpci-iommu.txt2 relationship between PCI(e) devices and IOMMU(s).
17 Requester ID. While a given PCI device can only master through one IOMMU, a
18 root complex may split masters across a set of IOMMUs (e.g. with one IOMMU per
22 and a mechanism is required to map from a PCI device to its IOMMU and sideband
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
33 -------------------
35 - iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
39 (rid-base,iommu,iommu-base,length).
41 Any RID r in the interval [rid-base, rid-base + length) is associated with
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/misc/
H A Dfsl,qoriq-mc.txt3 The Freescale Management Complex (fsl-mc) is a hardware resource
5 network-oriented packet processing applications. After the fsl-mc
12 For an overview of the DPAA2 architecture and fsl-mc bus see:
16 same hardware "isolation context" and a 10-bit value called an ICID
21 between ICIDs and IOMMUs, so an iommu-map property is used to define
22 the set of possible ICIDs under a root DPRC and how they map to
23 an IOMMU.
25 For generic IOMMU bindings, see
26 Documentation/devicetree/bindings/iommu/iommu.txt.
28 For arm-smmu binding, see:
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/OK3568_Linux_fs/u-boot/drivers/pci/
H A Dpcie_layerscape_fixup.c3 * Copyright 2014-2015 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
28 if (pcie->next_lut_index < PCIE_LUT_ENTRY_COUNT) in ls_pcie_next_lut_index()
29 return pcie->next_lut_index++; in ls_pcie_next_lut_index()
31 return -ENOSPC; /* LUT is full */ in ls_pcie_next_lut_index()
34 /* returns the next available streamid for pcie, -errno if failed */
40 return -EINVAL; in ls_pcie_next_streamid()
48 if (pcie->big_endian) in lut_writel()
49 out_be32(pcie->lut + offset, value); in lut_writel()
51 out_le32(pcie->lut + offset, value); in lut_writel()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/virtio/
H A Diommu.txt1 * virtio IOMMU PCI device
3 When virtio-iommu uses the PCI transport, its programming interface is
5 device tree statically describes the relation between IOMMU and DMA
6 masters. Therefore, the PCI root complex that hosts the virtio-iommu
7 contains a child node representing the IOMMU device explicitly.
11 - compatible: Should be "virtio,pci-iommu"
12 - reg: PCI address of the IOMMU. As defined in the PCI Bus
13 Binding reference [1], the reg property is a five-cell
18 - #iommu-cells: Each platform DMA master managed by the IOMMU is assigned
20 For virtio-iommu, #iommu-cells must be 1.
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/
H A Dmsm_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/adreno-smmu-priv.h>
8 #include <linux/io-pgtable.h>
36 struct io_pgtable_ops *ops = pagetable->pgtbl_ops; in msm_iommu_pagetable_unmap()
41 unmapped += ops->unmap(ops, iova, 4096, NULL); in msm_iommu_pagetable_unmap()
43 size -= 4096; in msm_iommu_pagetable_unmap()
46 iommu_flush_iotlb_all(to_msm_iommu(pagetable->parent)->domain); in msm_iommu_pagetable_unmap()
48 return (unmapped == size) ? 0 : -EINVAL; in msm_iommu_pagetable_unmap()
55 struct io_pgtable_ops *ops = pagetable->pgtbl_ops; in msm_iommu_pagetable_map()
62 size_t size = sg->length; in msm_iommu_pagetable_map()
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/OK3568_Linux_fs/kernel/drivers/iommu/
H A Dmsm_iommu.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
13 #include <linux/io-pgtable.h>
18 #include <linux/iommu.h>
26 #include "msm_iommu_hw-8xxx.h"
55 static int __enable_clocks(struct msm_iommu_dev *iommu) in __enable_clocks() argument
59 ret = clk_enable(iommu->pclk); in __enable_clocks()
63 if (iommu->clk) { in __enable_clocks()
64 ret = clk_enable(iommu->clk); in __enable_clocks()
66 clk_disable(iommu->pclk); in __enable_clocks()
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H A Dvirtio-iommu.c1 // SPDX-License-Identifier: GPL-2.0
3 * Virtio driver for the paravirtualized IOMMU
12 #include <linux/dma-iommu.h>
15 #include <linux/iommu.h>
36 struct iommu_device iommu; member
52 /* Supported MAP flags */
105 struct virtio_iommu_req_tail *tail = buf + len - sizeof(*tail); in viommu_get_req_errno()
107 switch (tail->status) { in viommu_get_req_errno()
111 return -ENOSYS; in viommu_get_req_errno()
113 return -EINVAL; in viommu_get_req_errno()
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/OK3568_Linux_fs/kernel/drivers/vfio/
H A Dvfio_iommu_type1.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * VFIO: IOMMU DMA mapping support for Type1 IOMMU
12 * We arbitrarily define a Type1 IOMMU as one matching the below code.
13 * It could be called the x86 IOMMU as it's designed for AMD-Vi & Intel
14 * VT-d, but that makes it harder to re-use as theoretically anyone
15 * implementing a similar IOMMU could make use of this. We expect the
16 * IOMMU to support the IOMMU API and have few to no restrictions around
17 * the IOVA range that can be mapped. The Type1 IOMMU is currently
19 * userpsace pages pinned into memory. We also assume devices and IOMMU
20 * domains are PCI based as the IOMMU API is still centered around a
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/OK3568_Linux_fs/kernel/drivers/vdpa/vdpa_sim/
H A Dvdpa_sim.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/iommu.h>
21 #include <linux/dma-map-ops.h>
39 MODULE_PARM_DESC(batch_mapping, "Batched mapping 1 -Enable; 0 - Disable");
65 #define VDPASIM_NAME "vdpasim-netdev"
90 struct vhost_iotlb *iommu; member
95 /* spinlock to synchronize iommu table */
99 /* TODO: cross-endian support */
103 (vdpasim->features & (1ULL << VIRTIO_F_VERSION_1)); in vdpasim_is_little_endian()
132 struct vdpasim_virtqueue *vq = &vdpasim->vqs[idx]; in vdpasim_queue_ready()
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/OK3568_Linux_fs/kernel/arch/sparc/kernel/
H A Diommu.c1 // SPDX-License-Identifier: GPL-2.0
2 /* iommu.c: Generic sparc64 IOMMU support.
13 #include <linux/dma-map-ops.h>
15 #include <linux/iommu-helper.h>
17 #include <asm/iommu-common.h>
23 #include <asm/iommu.h>
29 ((STC)->strbuf_ctxmatch_base + ((CTX) << 3))
31 (*((STC)->strbuf_flushflag) = 0UL)
33 (*((STC)->strbuf_flushflag) != 0UL)
49 /* Must be invoked under the IOMMU lock. */
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H A Dpci_sun4v.c1 // SPDX-License-Identifier: GPL-2.0
19 #include <linux/dma-map-ops.h>
20 #include <asm/iommu-common.h>
22 #include <asm/iommu.h>
57 unsigned long prot; /* IOMMU page protections */
71 p->dev = dev; in iommu_batch_start()
72 p->prot = prot; in iommu_batch_start()
73 p->entry = entry; in iommu_batch_start()
74 p->npages = 0; in iommu_batch_start()
77 static inline bool iommu_use_atu(struct iommu *iommu, u64 mask) in iommu_use_atu() argument
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H A Diommu-common.c1 // SPDX-License-Identifier: GPL-2.0
3 * IOMMU mmap management and range allocation functions.
4 * Based almost entirely upon the powerpc iommu allocator.
10 #include <linux/iommu-helper.h>
11 #include <linux/dma-mapping.h>
13 #include <asm/iommu-common.h>
19 static inline bool need_flush(struct iommu_map_table *iommu) in need_flush() argument
21 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0); in need_flush()
24 static inline void set_flush(struct iommu_map_table *iommu) in set_flush() argument
26 iommu->flags |= IOMMU_NEED_FLUSH; in set_flush()
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/OK3568_Linux_fs/kernel/include/linux/
H A Diommu.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2007-2008 Advanced Micro Devices, Inc.
17 #include <uapi/linux/iommu.h>
31 * if the IOMMU page table format is equivalent.
36 * the last-level or system cache, with a read/write allocation policy.
42 * the last-level or system cache, with a read allocation policy.
56 /* iommu fault flags */
72 #define __IOMMU_DOMAIN_DMA_API (1U << 1) /* Domain for use in DMA-API
77 * This are the possible domain-types
79 * IOMMU_DOMAIN_BLOCKED - All DMA is blocked, can be used to isolate
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H A Dio-pgtable.h1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <linux/iommu.h>
9 * Public API for use by IOMMU drivers
22 * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management.
46 * struct io_pgtable_cfg - Configuration data for a set of page tables.
49 * action by the low-level page table allocator.
55 * by the IOMMU are coherent with the CPU caches.
64 * even in non-secure state where they should normally be ignored.
67 * IOMMU_NOEXEC flags and map everything with full access, for
69 * format, and/or requires some format-specific default value.
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/OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/
H A Dp5020si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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H A Dp3041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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H A Dp2041si-post.dtsi4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10 0>;
51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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H A Dp5040si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus";
53 #address-cells = <2>;
54 #size-cells = <1>;
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/OK3568_Linux_fs/kernel/drivers/video/rockchip/mpp/
H A Dmpp_iommu_av1d.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Compatible with the IOMMU of av1 decode
5 * Module Authors: Yandong Lin <yandong.lin@rock-chips.com>
6 * Simon Xue <xxm@rock-chips.com>
13 #include <linux/dma-iommu.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/dma-map-ops.h>
19 #include <linux/iommu.h>
43 /* for av1 iommu */
55 struct iommu_device iommu; member
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/
H A Dgk20a.c30 * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
32 * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
35 * In both cases CPU read and writes are performed by creating a write-combined
74 * Used for objects flattened using the IOMMU API
86 /* array of base.mem->size pages (+ dma_addr_ts) */
103 /* Only used if IOMMU if present */
130 return (u64)gk20a_instobj(memory)->mn->offset << 12; in gk20a_instobj_addr()
136 return (u64)gk20a_instobj(memory)->mn->length << 12; in gk20a_instobj_size()
145 struct gk20a_instmem *imem = obj->base.imem; in gk20a_instobj_iommu_recycle_vaddr()
147 WARN_ON(obj->use_cpt); in gk20a_instobj_iommu_recycle_vaddr()
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/OK3568_Linux_fs/kernel/drivers/of/
H A Ddevice.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/dma-direct.h> /* for bus_dma_region */
9 #include <linux/dma-map-ops.h>
20 * of_match_device - Tell if a struct device matches an of_device_id list
30 if ((!matches) || (!dev->of_node)) in of_match_device()
32 return of_match_node(matches, dev->of_node); in of_match_device()
42 tmp = get_device(&dev->dev); in of_dev_get()
53 put_device(&dev->dev); in of_dev_put()
59 BUG_ON(ofdev->dev.of_node == NULL); in of_device_add()
63 ofdev->name = dev_name(&ofdev->dev); in of_device_add()
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/OK3568_Linux_fs/kernel/arch/x86/kernel/
H A Damd_gart_64.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Use the integrated AGP GART in the Hammer northbridge as an IOMMU for PCI.
9 * See Documentation/core-api/dma-api-howto.rst for the interface specification.
29 #include <linux/iommu-helper.h>
34 #include <linux/dma-direct.h>
35 #include <linux/dma-map-ops.h>
38 #include <asm/iommu.h>
54 * If this is disabled the IOMMU will use an optimized flushing strategy
105 if (offset == -1) { in alloc_iommu()
111 if (offset != -1) { in alloc_iommu()
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/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dstream_id_lsch2.h4 * SPDX-License-Identifier: GPL-2.0+
11 * Stream IDs on Chassis-2 (for example ls1043a, ls1046a, ls1012) devices
20 * -non-PCI legacy, platform devices (USB, SDHC, SATA, DMA, QE etc)
21 * -all legacy devices get a unique stream ID assigned and programmed in
22 * their AMQR registers by u-boot
24 * -PCIe
25 * -there is a range of stream IDs set aside for PCI in this
26 * file. U-boot will scan the PCI bus and for each device discovered:
27 * -allocate a streamID
28 * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID'
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/OK3568_Linux_fs/kernel/arch/sparc/mm/
H A Diommu.c1 // SPDX-License-Identifier: GPL-2.0
3 * iommu.c: IOMMU specific routines for memory management.
15 #include <linux/dma-map-ops.h>
25 #include <asm/iommu.h>
59 struct iommu_struct *iommu; in sbus_iommu_init() local
66 iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); in sbus_iommu_init()
67 if (!iommu) { in sbus_iommu_init()
68 prom_printf("Unable to allocate iommu structure\n"); in sbus_iommu_init()
72 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, in sbus_iommu_init()
74 if (!iommu->regs) { in sbus_iommu_init()
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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/arm/
H A Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
30 interrupt-names = "mhu_lpri_rx",
32 #mbox-cells = <1>;
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