xref: /OK3568_Linux_fs/kernel/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * P3041 Silicon/SoC Device Tree Source (post include)
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright 2011 - 2015 Freescale Semiconductor Inc.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
7*4882a593Smuzhiyun * modification, are permitted provided that the following conditions are met:
8*4882a593Smuzhiyun *     * Redistributions of source code must retain the above copyright
9*4882a593Smuzhiyun *       notice, this list of conditions and the following disclaimer.
10*4882a593Smuzhiyun *     * Redistributions in binary form must reproduce the above copyright
11*4882a593Smuzhiyun *       notice, this list of conditions and the following disclaimer in the
12*4882a593Smuzhiyun *       documentation and/or other materials provided with the distribution.
13*4882a593Smuzhiyun *     * Neither the name of Freescale Semiconductor nor the
14*4882a593Smuzhiyun *       names of its contributors may be used to endorse or promote products
15*4882a593Smuzhiyun *       derived from this software without specific prior written permission.
16*4882a593Smuzhiyun *
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * ALTERNATIVELY, this software may be distributed under the terms of the
19*4882a593Smuzhiyun * GNU General Public License ("GPL") as published by the Free Software
20*4882a593Smuzhiyun * Foundation, either version 2 of that License or (at your option) any
21*4882a593Smuzhiyun * later version.
22*4882a593Smuzhiyun *
23*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24*4882a593Smuzhiyun * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25*4882a593Smuzhiyun * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26*4882a593Smuzhiyun * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27*4882a593Smuzhiyun * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28*4882a593Smuzhiyun * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29*4882a593Smuzhiyun * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30*4882a593Smuzhiyun * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32*4882a593Smuzhiyun * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33*4882a593Smuzhiyun */
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun&bman_fbpr {
36*4882a593Smuzhiyun	compatible = "fsl,bman-fbpr";
37*4882a593Smuzhiyun	alloc-ranges = <0 0 0x10 0>;
38*4882a593Smuzhiyun};
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun&qman_fqd {
41*4882a593Smuzhiyun	compatible = "fsl,qman-fqd";
42*4882a593Smuzhiyun	alloc-ranges = <0 0 0x10 0>;
43*4882a593Smuzhiyun};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun&qman_pfdr {
46*4882a593Smuzhiyun	compatible = "fsl,qman-pfdr";
47*4882a593Smuzhiyun	alloc-ranges = <0 0 0x10 0>;
48*4882a593Smuzhiyun};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun&lbc {
51*4882a593Smuzhiyun	compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
52*4882a593Smuzhiyun	interrupts = <25 2 0 0>;
53*4882a593Smuzhiyun	#address-cells = <2>;
54*4882a593Smuzhiyun	#size-cells = <1>;
55*4882a593Smuzhiyun};
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun/* controller at 0x200000 */
58*4882a593Smuzhiyun&pci0 {
59*4882a593Smuzhiyun	compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
60*4882a593Smuzhiyun	device_type = "pci";
61*4882a593Smuzhiyun	#size-cells = <2>;
62*4882a593Smuzhiyun	#address-cells = <3>;
63*4882a593Smuzhiyun	bus-range = <0x0 0xff>;
64*4882a593Smuzhiyun	clock-frequency = <33333333>;
65*4882a593Smuzhiyun	interrupts = <16 2 1 15>;
66*4882a593Smuzhiyun	fsl,iommu-parent = <&pamu0>;
67*4882a593Smuzhiyun	fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
68*4882a593Smuzhiyun	pcie@0 {
69*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
70*4882a593Smuzhiyun		#interrupt-cells = <1>;
71*4882a593Smuzhiyun		#size-cells = <2>;
72*4882a593Smuzhiyun		#address-cells = <3>;
73*4882a593Smuzhiyun		device_type = "pci";
74*4882a593Smuzhiyun		interrupts = <16 2 1 15>;
75*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
76*4882a593Smuzhiyun		interrupt-map = <
77*4882a593Smuzhiyun			/* IDSEL 0x0 */
78*4882a593Smuzhiyun			0000 0 0 1 &mpic 40 1 0 0
79*4882a593Smuzhiyun			0000 0 0 2 &mpic 1 1 0 0
80*4882a593Smuzhiyun			0000 0 0 3 &mpic 2 1 0 0
81*4882a593Smuzhiyun			0000 0 0 4 &mpic 3 1 0 0
82*4882a593Smuzhiyun			>;
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun/* controller at 0x201000 */
87*4882a593Smuzhiyun&pci1 {
88*4882a593Smuzhiyun	compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
89*4882a593Smuzhiyun	device_type = "pci";
90*4882a593Smuzhiyun	#size-cells = <2>;
91*4882a593Smuzhiyun	#address-cells = <3>;
92*4882a593Smuzhiyun	bus-range = <0 0xff>;
93*4882a593Smuzhiyun	clock-frequency = <33333333>;
94*4882a593Smuzhiyun	interrupts = <16 2 1 14>;
95*4882a593Smuzhiyun	fsl,iommu-parent = <&pamu0>;
96*4882a593Smuzhiyun	fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
97*4882a593Smuzhiyun	pcie@0 {
98*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
99*4882a593Smuzhiyun		#interrupt-cells = <1>;
100*4882a593Smuzhiyun		#size-cells = <2>;
101*4882a593Smuzhiyun		#address-cells = <3>;
102*4882a593Smuzhiyun		device_type = "pci";
103*4882a593Smuzhiyun		interrupts = <16 2 1 14>;
104*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
105*4882a593Smuzhiyun		interrupt-map = <
106*4882a593Smuzhiyun			/* IDSEL 0x0 */
107*4882a593Smuzhiyun			0000 0 0 1 &mpic 41 1 0 0
108*4882a593Smuzhiyun			0000 0 0 2 &mpic 5 1 0 0
109*4882a593Smuzhiyun			0000 0 0 3 &mpic 6 1 0 0
110*4882a593Smuzhiyun			0000 0 0 4 &mpic 7 1 0 0
111*4882a593Smuzhiyun			>;
112*4882a593Smuzhiyun	};
113*4882a593Smuzhiyun};
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun/* controller at 0x202000 */
116*4882a593Smuzhiyun&pci2 {
117*4882a593Smuzhiyun	compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
118*4882a593Smuzhiyun	device_type = "pci";
119*4882a593Smuzhiyun	#size-cells = <2>;
120*4882a593Smuzhiyun	#address-cells = <3>;
121*4882a593Smuzhiyun	bus-range = <0x0 0xff>;
122*4882a593Smuzhiyun	clock-frequency = <33333333>;
123*4882a593Smuzhiyun	interrupts = <16 2 1 13>;
124*4882a593Smuzhiyun	fsl,iommu-parent = <&pamu0>;
125*4882a593Smuzhiyun	fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
126*4882a593Smuzhiyun	pcie@0 {
127*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
128*4882a593Smuzhiyun		#interrupt-cells = <1>;
129*4882a593Smuzhiyun		#size-cells = <2>;
130*4882a593Smuzhiyun		#address-cells = <3>;
131*4882a593Smuzhiyun		device_type = "pci";
132*4882a593Smuzhiyun		interrupts = <16 2 1 13>;
133*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
134*4882a593Smuzhiyun		interrupt-map = <
135*4882a593Smuzhiyun			/* IDSEL 0x0 */
136*4882a593Smuzhiyun			0000 0 0 1 &mpic 42 1 0 0
137*4882a593Smuzhiyun			0000 0 0 2 &mpic 9 1 0 0
138*4882a593Smuzhiyun			0000 0 0 3 &mpic 10 1 0 0
139*4882a593Smuzhiyun			0000 0 0 4 &mpic 11 1 0 0
140*4882a593Smuzhiyun			>;
141*4882a593Smuzhiyun	};
142*4882a593Smuzhiyun};
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun/* controller at 0x203000 */
145*4882a593Smuzhiyun&pci3 {
146*4882a593Smuzhiyun	compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
147*4882a593Smuzhiyun	device_type = "pci";
148*4882a593Smuzhiyun	#size-cells = <2>;
149*4882a593Smuzhiyun	#address-cells = <3>;
150*4882a593Smuzhiyun	bus-range = <0x0 0xff>;
151*4882a593Smuzhiyun	clock-frequency = <33333333>;
152*4882a593Smuzhiyun	interrupts = <16 2 1 12>;
153*4882a593Smuzhiyun	pcie@0 {
154*4882a593Smuzhiyun		reg = <0 0 0 0 0>;
155*4882a593Smuzhiyun		#interrupt-cells = <1>;
156*4882a593Smuzhiyun		#size-cells = <2>;
157*4882a593Smuzhiyun		#address-cells = <3>;
158*4882a593Smuzhiyun		device_type = "pci";
159*4882a593Smuzhiyun		interrupts = <16 2 1 12>;
160*4882a593Smuzhiyun		interrupt-map-mask = <0xf800 0 0 7>;
161*4882a593Smuzhiyun		interrupt-map = <
162*4882a593Smuzhiyun			/* IDSEL 0x0 */
163*4882a593Smuzhiyun			0000 0 0 1 &mpic 43 1 0 0
164*4882a593Smuzhiyun			0000 0 0 2 &mpic 0 1 0 0
165*4882a593Smuzhiyun			0000 0 0 3 &mpic 4 1 0 0
166*4882a593Smuzhiyun			0000 0 0 4 &mpic 8 1 0 0
167*4882a593Smuzhiyun			>;
168*4882a593Smuzhiyun	};
169*4882a593Smuzhiyun};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun&rio {
172*4882a593Smuzhiyun	compatible = "fsl,srio";
173*4882a593Smuzhiyun	interrupts = <16 2 1 11>;
174*4882a593Smuzhiyun	#address-cells = <2>;
175*4882a593Smuzhiyun	#size-cells = <2>;
176*4882a593Smuzhiyun	fsl,iommu-parent = <&pamu0>;
177*4882a593Smuzhiyun	ranges;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun	port1 {
180*4882a593Smuzhiyun		#address-cells = <2>;
181*4882a593Smuzhiyun		#size-cells = <2>;
182*4882a593Smuzhiyun		cell-index = <1>;
183*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun	port2 {
187*4882a593Smuzhiyun		#address-cells = <2>;
188*4882a593Smuzhiyun		#size-cells = <2>;
189*4882a593Smuzhiyun		cell-index = <2>;
190*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
191*4882a593Smuzhiyun	};
192*4882a593Smuzhiyun};
193*4882a593Smuzhiyun
194*4882a593Smuzhiyun&dcsr {
195*4882a593Smuzhiyun	#address-cells = <1>;
196*4882a593Smuzhiyun	#size-cells = <1>;
197*4882a593Smuzhiyun	compatible = "fsl,dcsr", "simple-bus";
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun	dcsr-epu@0 {
200*4882a593Smuzhiyun		compatible = "fsl,p3041-dcsr-epu", "fsl,dcsr-epu";
201*4882a593Smuzhiyun		interrupts = <52 2 0 0
202*4882a593Smuzhiyun			      84 2 0 0
203*4882a593Smuzhiyun			      85 2 0 0>;
204*4882a593Smuzhiyun		reg = <0x0 0x1000>;
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun	dcsr-npc {
207*4882a593Smuzhiyun		compatible = "fsl,dcsr-npc";
208*4882a593Smuzhiyun		reg = <0x1000 0x1000 0x1000000 0x8000>;
209*4882a593Smuzhiyun	};
210*4882a593Smuzhiyun	dcsr-nxc@2000 {
211*4882a593Smuzhiyun		compatible = "fsl,dcsr-nxc";
212*4882a593Smuzhiyun		reg = <0x2000 0x1000>;
213*4882a593Smuzhiyun	};
214*4882a593Smuzhiyun	dcsr-corenet {
215*4882a593Smuzhiyun		compatible = "fsl,dcsr-corenet";
216*4882a593Smuzhiyun		reg = <0x8000 0x1000 0xB0000 0x1000>;
217*4882a593Smuzhiyun	};
218*4882a593Smuzhiyun	dcsr-dpaa@9000 {
219*4882a593Smuzhiyun		compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa";
220*4882a593Smuzhiyun		reg = <0x9000 0x1000>;
221*4882a593Smuzhiyun	};
222*4882a593Smuzhiyun	dcsr-ocn@11000 {
223*4882a593Smuzhiyun		compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn";
224*4882a593Smuzhiyun		reg = <0x11000 0x1000>;
225*4882a593Smuzhiyun	};
226*4882a593Smuzhiyun	dcsr-ddr@12000 {
227*4882a593Smuzhiyun		compatible = "fsl,dcsr-ddr";
228*4882a593Smuzhiyun		dev-handle = <&ddr1>;
229*4882a593Smuzhiyun		reg = <0x12000 0x1000>;
230*4882a593Smuzhiyun	};
231*4882a593Smuzhiyun	dcsr-nal@18000 {
232*4882a593Smuzhiyun		compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal";
233*4882a593Smuzhiyun		reg = <0x18000 0x1000>;
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun	dcsr-rcpm@22000 {
236*4882a593Smuzhiyun		compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm";
237*4882a593Smuzhiyun		reg = <0x22000 0x1000>;
238*4882a593Smuzhiyun	};
239*4882a593Smuzhiyun	dcsr-cpu-sb-proxy@40000 {
240*4882a593Smuzhiyun		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
241*4882a593Smuzhiyun		cpu-handle = <&cpu0>;
242*4882a593Smuzhiyun		reg = <0x40000 0x1000>;
243*4882a593Smuzhiyun	};
244*4882a593Smuzhiyun	dcsr-cpu-sb-proxy@41000 {
245*4882a593Smuzhiyun		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
246*4882a593Smuzhiyun		cpu-handle = <&cpu1>;
247*4882a593Smuzhiyun		reg = <0x41000 0x1000>;
248*4882a593Smuzhiyun	};
249*4882a593Smuzhiyun	dcsr-cpu-sb-proxy@42000 {
250*4882a593Smuzhiyun		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
251*4882a593Smuzhiyun		cpu-handle = <&cpu2>;
252*4882a593Smuzhiyun		reg = <0x42000 0x1000>;
253*4882a593Smuzhiyun	};
254*4882a593Smuzhiyun	dcsr-cpu-sb-proxy@43000 {
255*4882a593Smuzhiyun		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
256*4882a593Smuzhiyun		cpu-handle = <&cpu3>;
257*4882a593Smuzhiyun		reg = <0x43000 0x1000>;
258*4882a593Smuzhiyun	};
259*4882a593Smuzhiyun};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun/include/ "qoriq-bman1-portals.dtsi"
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun/include/ "qoriq-qman1-portals.dtsi"
264*4882a593Smuzhiyun
265*4882a593Smuzhiyun&soc {
266*4882a593Smuzhiyun	#address-cells = <1>;
267*4882a593Smuzhiyun	#size-cells = <1>;
268*4882a593Smuzhiyun	device_type = "soc";
269*4882a593Smuzhiyun	compatible = "simple-bus";
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun	soc-sram-error {
272*4882a593Smuzhiyun		compatible = "fsl,soc-sram-error";
273*4882a593Smuzhiyun		interrupts = <16 2 1 29>;
274*4882a593Smuzhiyun	};
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun	corenet-law@0 {
277*4882a593Smuzhiyun		compatible = "fsl,corenet-law";
278*4882a593Smuzhiyun		reg = <0x0 0x1000>;
279*4882a593Smuzhiyun		fsl,num-laws = <32>;
280*4882a593Smuzhiyun	};
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun	ddr1: memory-controller@8000 {
283*4882a593Smuzhiyun		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
284*4882a593Smuzhiyun		reg = <0x8000 0x1000>;
285*4882a593Smuzhiyun		interrupts = <16 2 1 23>;
286*4882a593Smuzhiyun	};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun	cpc: l3-cache-controller@10000 {
289*4882a593Smuzhiyun		compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
290*4882a593Smuzhiyun		reg = <0x10000 0x1000>;
291*4882a593Smuzhiyun		interrupts = <16 2 1 27>;
292*4882a593Smuzhiyun	};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun	corenet-cf@18000 {
295*4882a593Smuzhiyun		compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
296*4882a593Smuzhiyun		reg = <0x18000 0x1000>;
297*4882a593Smuzhiyun		interrupts = <16 2 1 31>;
298*4882a593Smuzhiyun		fsl,ccf-num-csdids = <32>;
299*4882a593Smuzhiyun		fsl,ccf-num-snoopids = <32>;
300*4882a593Smuzhiyun	};
301*4882a593Smuzhiyun
302*4882a593Smuzhiyun	iommu@20000 {
303*4882a593Smuzhiyun		compatible = "fsl,pamu-v1.0", "fsl,pamu";
304*4882a593Smuzhiyun		reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
305*4882a593Smuzhiyun		ranges = <0 0x20000 0x4000>;
306*4882a593Smuzhiyun		#address-cells = <1>;
307*4882a593Smuzhiyun		#size-cells = <1>;
308*4882a593Smuzhiyun		interrupts = <
309*4882a593Smuzhiyun			24 2 0 0
310*4882a593Smuzhiyun			16 2 1 30>;
311*4882a593Smuzhiyun		fsl,portid-mapping = <0x0f000000>;
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun		pamu0: pamu@0 {
314*4882a593Smuzhiyun			reg = <0 0x1000>;
315*4882a593Smuzhiyun			fsl,primary-cache-geometry = <32 1>;
316*4882a593Smuzhiyun			fsl,secondary-cache-geometry = <128 2>;
317*4882a593Smuzhiyun		};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun		pamu1: pamu@1000 {
320*4882a593Smuzhiyun			reg = <0x1000 0x1000>;
321*4882a593Smuzhiyun			fsl,primary-cache-geometry = <32 1>;
322*4882a593Smuzhiyun			fsl,secondary-cache-geometry = <128 2>;
323*4882a593Smuzhiyun		};
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun		pamu2: pamu@2000 {
326*4882a593Smuzhiyun			reg = <0x2000 0x1000>;
327*4882a593Smuzhiyun			fsl,primary-cache-geometry = <32 1>;
328*4882a593Smuzhiyun			fsl,secondary-cache-geometry = <128 2>;
329*4882a593Smuzhiyun		};
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun		pamu3: pamu@3000 {
332*4882a593Smuzhiyun			reg = <0x3000 0x1000>;
333*4882a593Smuzhiyun			fsl,primary-cache-geometry = <32 1>;
334*4882a593Smuzhiyun			fsl,secondary-cache-geometry = <128 2>;
335*4882a593Smuzhiyun		};
336*4882a593Smuzhiyun	};
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun/include/ "qoriq-mpic.dtsi"
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun	guts: global-utilities@e0000 {
341*4882a593Smuzhiyun		compatible = "fsl,qoriq-device-config-1.0";
342*4882a593Smuzhiyun		reg = <0xe0000 0xe00>;
343*4882a593Smuzhiyun		fsl,has-rstcr;
344*4882a593Smuzhiyun		#sleep-cells = <1>;
345*4882a593Smuzhiyun		fsl,liodn-bits = <12>;
346*4882a593Smuzhiyun	};
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun	pins: global-utilities@e0e00 {
349*4882a593Smuzhiyun		compatible = "fsl,qoriq-pin-control-1.0";
350*4882a593Smuzhiyun		reg = <0xe0e00 0x200>;
351*4882a593Smuzhiyun		#sleep-cells = <2>;
352*4882a593Smuzhiyun	};
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun/include/ "qoriq-clockgen1.dtsi"
355*4882a593Smuzhiyun	global-utilities@e1000 {
356*4882a593Smuzhiyun		compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
357*4882a593Smuzhiyun	};
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun	rcpm: global-utilities@e2000 {
360*4882a593Smuzhiyun		compatible = "fsl,qoriq-rcpm-1.0";
361*4882a593Smuzhiyun		reg = <0xe2000 0x1000>;
362*4882a593Smuzhiyun		#sleep-cells = <1>;
363*4882a593Smuzhiyun	};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun	sfp: sfp@e8000 {
366*4882a593Smuzhiyun		compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
367*4882a593Smuzhiyun		reg	   = <0xe8000 0x1000>;
368*4882a593Smuzhiyun	};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun	serdes: serdes@ea000 {
371*4882a593Smuzhiyun		compatible = "fsl,p3041-serdes";
372*4882a593Smuzhiyun		reg	   = <0xea000 0x1000>;
373*4882a593Smuzhiyun	};
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun/include/ "qoriq-dma-0.dtsi"
376*4882a593Smuzhiyun	dma@100300 {
377*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu0>;
378*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
379*4882a593Smuzhiyun	};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun/include/ "qoriq-dma-1.dtsi"
382*4882a593Smuzhiyun	dma@101300 {
383*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu0>;
384*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
385*4882a593Smuzhiyun	};
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun/include/ "qoriq-espi-0.dtsi"
388*4882a593Smuzhiyun	spi@110000 {
389*4882a593Smuzhiyun		fsl,espi-num-chipselects = <4>;
390*4882a593Smuzhiyun	};
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun/include/ "qoriq-esdhc-0.dtsi"
393*4882a593Smuzhiyun	sdhc@114000 {
394*4882a593Smuzhiyun		compatible = "fsl,p3041-esdhc", "fsl,esdhc";
395*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu1>;
396*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
397*4882a593Smuzhiyun		sdhci,auto-cmd12;
398*4882a593Smuzhiyun	};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun/include/ "qoriq-i2c-0.dtsi"
401*4882a593Smuzhiyun/include/ "qoriq-i2c-1.dtsi"
402*4882a593Smuzhiyun/include/ "qoriq-duart-0.dtsi"
403*4882a593Smuzhiyun/include/ "qoriq-duart-1.dtsi"
404*4882a593Smuzhiyun/include/ "qoriq-gpio-0.dtsi"
405*4882a593Smuzhiyun/include/ "qoriq-usb2-mph-0.dtsi"
406*4882a593Smuzhiyun	usb0: usb@210000 {
407*4882a593Smuzhiyun		compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph";
408*4882a593Smuzhiyun		phy_type = "utmi";
409*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu1>;
410*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
411*4882a593Smuzhiyun		port0;
412*4882a593Smuzhiyun	};
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun/include/ "qoriq-usb2-dr-0.dtsi"
415*4882a593Smuzhiyun	usb1: usb@211000 {
416*4882a593Smuzhiyun		compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
417*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu1>;
418*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
419*4882a593Smuzhiyun		dr_mode = "host";
420*4882a593Smuzhiyun		phy_type = "utmi";
421*4882a593Smuzhiyun	};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun/include/ "qoriq-sata2-0.dtsi"
424*4882a593Smuzhiyun	sata@220000 {
425*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu1>;
426*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
427*4882a593Smuzhiyun	};
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun/include/ "qoriq-sata2-1.dtsi"
430*4882a593Smuzhiyun	sata@221000 {
431*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu1>;
432*4882a593Smuzhiyun		fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
433*4882a593Smuzhiyun	};
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun/include/ "qoriq-sec4.2-0.dtsi"
436*4882a593Smuzhiyuncrypto: crypto@300000 {
437*4882a593Smuzhiyun		fsl,iommu-parent = <&pamu1>;
438*4882a593Smuzhiyun	};
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun/include/ "qoriq-qman1.dtsi"
441*4882a593Smuzhiyun/include/ "qoriq-bman1.dtsi"
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun/include/ "qoriq-fman-0.dtsi"
444*4882a593Smuzhiyun/include/ "qoriq-fman-0-1g-0.dtsi"
445*4882a593Smuzhiyun/include/ "qoriq-fman-0-1g-1.dtsi"
446*4882a593Smuzhiyun/include/ "qoriq-fman-0-1g-2.dtsi"
447*4882a593Smuzhiyun/include/ "qoriq-fman-0-1g-3.dtsi"
448*4882a593Smuzhiyun/include/ "qoriq-fman-0-1g-4.dtsi"
449*4882a593Smuzhiyun/include/ "qoriq-fman-0-10g-0.dtsi"
450*4882a593Smuzhiyun	fman@400000 {
451*4882a593Smuzhiyun		enet0: ethernet@e0000 {
452*4882a593Smuzhiyun		};
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun		enet1: ethernet@e2000 {
455*4882a593Smuzhiyun		};
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun		enet2: ethernet@e4000 {
458*4882a593Smuzhiyun		};
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun		enet3: ethernet@e6000 {
461*4882a593Smuzhiyun		};
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun		enet4: ethernet@e8000 {
464*4882a593Smuzhiyun		};
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun		enet5: ethernet@f0000 {
467*4882a593Smuzhiyun		};
468*4882a593Smuzhiyun	};
469*4882a593Smuzhiyun};
470