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/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gfx.c31 /* delay 0.1 second to enable gfx off feature */
35 * GPU GFX IP block helpers function.
43 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
44 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
45 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
54 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_queue_mask_bit_to_mec_queue()
55 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
56 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
57 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
58 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
[all …]
H A Damdgpu_rlc.c39 if (adev->gfx.rlc.in_safe_mode) in amdgpu_gfx_rlc_enter_safe_mode()
43 if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) in amdgpu_gfx_rlc_enter_safe_mode()
49 adev->gfx.rlc.funcs->set_safe_mode(adev); in amdgpu_gfx_rlc_enter_safe_mode()
50 adev->gfx.rlc.in_safe_mode = true; in amdgpu_gfx_rlc_enter_safe_mode()
63 if (!(adev->gfx.rlc.in_safe_mode)) in amdgpu_gfx_rlc_exit_safe_mode()
67 if (!adev->gfx.rlc.funcs->is_rlc_enabled(adev)) in amdgpu_gfx_rlc_exit_safe_mode()
73 adev->gfx.rlc.funcs->unset_safe_mode(adev); in amdgpu_gfx_rlc_exit_safe_mode()
74 adev->gfx.rlc.in_safe_mode = false; in amdgpu_gfx_rlc_exit_safe_mode()
97 &adev->gfx.rlc.save_restore_obj, in amdgpu_gfx_rlc_init_sr()
98 &adev->gfx.rlc.save_restore_gpu_addr, in amdgpu_gfx_rlc_init_sr()
[all …]
H A Dgfx_v6_0.c341 err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); in gfx_v6_0_init_microcode()
344 err = amdgpu_ucode_validate(adev->gfx.pfp_fw); in gfx_v6_0_init_microcode()
347 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; in gfx_v6_0_init_microcode()
348 adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()
349 adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()
352 err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); in gfx_v6_0_init_microcode()
355 err = amdgpu_ucode_validate(adev->gfx.me_fw); in gfx_v6_0_init_microcode()
358 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v6_0_init_microcode()
359 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()
360 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()
[all …]
H A Dgfx_v7_0.c930 err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
933 err = amdgpu_ucode_validate(adev->gfx.pfp_fw); in gfx_v7_0_init_microcode()
938 err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
941 err = amdgpu_ucode_validate(adev->gfx.me_fw); in gfx_v7_0_init_microcode()
946 err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
949 err = amdgpu_ucode_validate(adev->gfx.ce_fw); in gfx_v7_0_init_microcode()
954 err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
957 err = amdgpu_ucode_validate(adev->gfx.mec_fw); in gfx_v7_0_init_microcode()
963 err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
966 err = amdgpu_ucode_validate(adev->gfx.mec2_fw); in gfx_v7_0_init_microcode()
[all …]
H A Dgfx_v8_0.c831 adev->gfx.scratch.num_reg = 8; in gfx_v8_0_scratch_init()
832 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v8_0_scratch_init()
833 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v8_0_scratch_init()
932 release_firmware(adev->gfx.pfp_fw); in gfx_v8_0_free_microcode()
933 adev->gfx.pfp_fw = NULL; in gfx_v8_0_free_microcode()
934 release_firmware(adev->gfx.me_fw); in gfx_v8_0_free_microcode()
935 adev->gfx.me_fw = NULL; in gfx_v8_0_free_microcode()
936 release_firmware(adev->gfx.ce_fw); in gfx_v8_0_free_microcode()
937 adev->gfx.ce_fw = NULL; in gfx_v8_0_free_microcode()
938 release_firmware(adev->gfx.rlc_fw); in gfx_v8_0_free_microcode()
[all …]
H A Dgfx_v9_0.c47 #include "ivsrcid/gfx/irqsrcs_gfx_9_0.h"
937 adev->gfx.kiq.pmf = &gfx_v9_0_kiq_pm4_funcs; in gfx_v9_0_set_kiq_pm4_funcs()
1000 adev->gfx.scratch.num_reg = 8; in gfx_v9_0_scratch_init()
1001 adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v9_0_scratch_init()
1002 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v9_0_scratch_init()
1135 release_firmware(adev->gfx.pfp_fw); in gfx_v9_0_free_microcode()
1136 adev->gfx.pfp_fw = NULL; in gfx_v9_0_free_microcode()
1137 release_firmware(adev->gfx.me_fw); in gfx_v9_0_free_microcode()
1138 adev->gfx.me_fw = NULL; in gfx_v9_0_free_microcode()
1139 release_firmware(adev->gfx.ce_fw); in gfx_v9_0_free_microcode()
[all …]
H A Damdgpu_discovery.c395 adev->gfx.config.max_shader_engines = le32_to_cpu(gc_info->v1.gc_num_se); in amdgpu_discovery_get_gfx_info()
396 adev->gfx.config.max_cu_per_sh = 2 * (le32_to_cpu(gc_info->v1.gc_num_wgp0_per_sa) + in amdgpu_discovery_get_gfx_info()
398 adev->gfx.config.max_sh_per_se = le32_to_cpu(gc_info->v1.gc_num_sa_per_se); in amdgpu_discovery_get_gfx_info()
399 adev->gfx.config.max_backends_per_se = le32_to_cpu(gc_info->v1.gc_num_rb_per_se); in amdgpu_discovery_get_gfx_info()
400 adev->gfx.config.max_texture_channel_caches = le32_to_cpu(gc_info->v1.gc_num_gl2c); in amdgpu_discovery_get_gfx_info()
401 adev->gfx.config.max_gprs = le32_to_cpu(gc_info->v1.gc_num_gprs); in amdgpu_discovery_get_gfx_info()
402 adev->gfx.config.max_gs_threads = le32_to_cpu(gc_info->v1.gc_num_max_gs_thds); in amdgpu_discovery_get_gfx_info()
403 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gc_info->v1.gc_gs_table_depth); in amdgpu_discovery_get_gfx_info()
404 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gc_info->v1.gc_gsprim_buff_depth); in amdgpu_discovery_get_gfx_info()
405 adev->gfx.config.double_offchip_lds_buf = le32_to_cpu(gc_info->v1.gc_double_offchip_lds_buffer); in amdgpu_discovery_get_gfx_info()
[all …]
H A Dgfx_v10_0.c42 #include "ivsrcid/gfx/irqsrcs_gfx_10_1.h"
3335 adev->gfx.kiq.pmf = &gfx_v10_0_kiq_pm4_funcs; in gfx_v10_0_set_kiq_pm4_funcs()
3410 adev->gfx.scratch.num_reg = 8; in gfx_v10_0_scratch_init()
3411 adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v10_0_scratch_init()
3412 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v10_0_scratch_init()
3551 release_firmware(adev->gfx.pfp_fw); in gfx_v10_0_free_microcode()
3552 adev->gfx.pfp_fw = NULL; in gfx_v10_0_free_microcode()
3553 release_firmware(adev->gfx.me_fw); in gfx_v10_0_free_microcode()
3554 adev->gfx.me_fw = NULL; in gfx_v10_0_free_microcode()
3555 release_firmware(adev->gfx.ce_fw); in gfx_v10_0_free_microcode()
[all …]
H A Damdgpu_kms.c243 fw_info->ver = adev->gfx.me_fw_version; in amdgpu_firmware_info()
244 fw_info->feature = adev->gfx.me_feature_version; in amdgpu_firmware_info()
247 fw_info->ver = adev->gfx.pfp_fw_version; in amdgpu_firmware_info()
248 fw_info->feature = adev->gfx.pfp_feature_version; in amdgpu_firmware_info()
251 fw_info->ver = adev->gfx.ce_fw_version; in amdgpu_firmware_info()
252 fw_info->feature = adev->gfx.ce_feature_version; in amdgpu_firmware_info()
255 fw_info->ver = adev->gfx.rlc_fw_version; in amdgpu_firmware_info()
256 fw_info->feature = adev->gfx.rlc_feature_version; in amdgpu_firmware_info()
259 fw_info->ver = adev->gfx.rlc_srlc_fw_version; in amdgpu_firmware_info()
260 fw_info->feature = adev->gfx.rlc_srlc_feature_version; in amdgpu_firmware_info()
[all …]
H A Damdgpu_gfx.h28 * GFX stuff
34 /* GFX current status */
118 * GFX configurations
176 /* gfx configure feature */
301 /* gfx status */
312 /* gfx off */
315 … gfx_off_req_count; /* default 1, enable gfx off: dec 1, disable gfx off: ad…
326 #define amdgpu_gfx_get_gpu_clock_counter(adev) (adev)->gfx.funcs->get_gpu_clock_counter((adev))
327 #define amdgpu_gfx_select_se_sh(adev, se, sh, instance) (adev)->gfx.funcs->select_se_sh((adev), (se…
328 #define amdgpu_gfx_select_me_pipe_q(adev, me, pipe, q, vmid) (adev)->gfx.funcs->select_me_pipe_q((a…
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H A Damdgpu_ucode.c98 DRM_DEBUG("GFX\n"); in amdgpu_ucode_print_gfx_hdr()
110 DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor); in amdgpu_ucode_print_gfx_hdr()
420 FW_VERSION_ATTR(me_fw_version, 0444, gfx.me_fw_version);
421 FW_VERSION_ATTR(pfp_fw_version, 0444, gfx.pfp_fw_version);
422 FW_VERSION_ATTR(ce_fw_version, 0444, gfx.ce_fw_version);
423 FW_VERSION_ATTR(rlc_fw_version, 0444, gfx.rlc_fw_version);
424 FW_VERSION_ATTR(rlc_srlc_fw_version, 0444, gfx.rlc_srlc_fw_version);
425 FW_VERSION_ATTR(rlc_srlg_fw_version, 0444, gfx.rlc_srlg_fw_version);
426 FW_VERSION_ATTR(rlc_srls_fw_version, 0444, gfx.rlc_srls_fw_version);
427 FW_VERSION_ATTR(mec_fw_version, 0444, gfx.mec_fw_version);
[all …]
H A Damdgpu_amdkfd.c122 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init()
123 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init()
136 adev->gfx.mec.queue_bitmap, in amdgpu_amdkfd_device_init()
143 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
144 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
365 return adev->gfx.pfp_fw_version; in amdgpu_amdkfd_get_fw_version()
368 return adev->gfx.me_fw_version; in amdgpu_amdkfd_get_fw_version()
371 return adev->gfx.ce_fw_version; in amdgpu_amdkfd_get_fw_version()
374 return adev->gfx.mec_fw_version; in amdgpu_amdkfd_get_fw_version()
377 return adev->gfx.mec2_fw_version; in amdgpu_amdkfd_get_fw_version()
[all …]
H A Damdgpu_debugfs.c243 if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || in amdgpu_debugfs_process_reg_op()
244 (se_bank != 0xFFFFFFFF && se_bank >= adev->gfx.config.max_shader_engines)) { in amdgpu_debugfs_process_reg_op()
679 * amdgpu_debugfs_gca_config_read - Read from gfx config data
709 config[no_regs++] = adev->gfx.config.max_shader_engines; in amdgpu_debugfs_gca_config_read()
710 config[no_regs++] = adev->gfx.config.max_tile_pipes; in amdgpu_debugfs_gca_config_read()
711 config[no_regs++] = adev->gfx.config.max_cu_per_sh; in amdgpu_debugfs_gca_config_read()
712 config[no_regs++] = adev->gfx.config.max_sh_per_se; in amdgpu_debugfs_gca_config_read()
713 config[no_regs++] = adev->gfx.config.max_backends_per_se; in amdgpu_debugfs_gca_config_read()
714 config[no_regs++] = adev->gfx.config.max_texture_channel_caches; in amdgpu_debugfs_gca_config_read()
715 config[no_regs++] = adev->gfx.config.max_gprs; in amdgpu_debugfs_gca_config_read()
[all …]
H A Damdgpu_amdkfd_gfx_v9.c74 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
75 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
83 unsigned int bit = pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
127 * need to do this twice, once for gfx and once for mmhub in kgd_gfx_v9_set_pasid_vmid_mapping()
178 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_init_interrupts()
179 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_init_interrupts()
319 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_gfx_v9_hiq_mqd_load()
328 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_gfx_v9_hiq_mqd_load()
329 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_gfx_v9_hiq_mqd_load()
334 spin_lock(&adev->gfx.kiq.ring_lock); in kgd_gfx_v9_hiq_mqd_load()
[all …]
/OK3568_Linux_fs/yocto/meta-browser/meta-firefox/recipes-browser/firefox/firefox/wayland/egl/
H A Dbug1571603-Disable-eglQueryString-nullptr-EGL_EXTENSIONS.patch15 gfx/gl/GLContextProviderEGL.cpp | 6 ++++++
16 gfx/gl/GLLibraryEGL.cpp | 2 ++
19 diff --git a/gfx/gl/GLContextProviderEGL.cpp b/gfx/gl/GLContextProviderEGL.cpp
21 --- a/gfx/gl/GLContextProviderEGL.cpp
22 +++ b/gfx/gl/GLContextProviderEGL.cpp
40 diff --git a/gfx/gl/GLLibraryEGL.cpp b/gfx/gl/GLLibraryEGL.cpp
42 --- a/gfx/gl/GLLibraryEGL.cpp
43 +++ b/gfx/gl/GLLibraryEGL.cpp
H A D0001-GLLibraryLoader-Use-given-symbol-lookup-function-fir.patch9 gfx/gl/GLLibraryLoader.cpp | 6 +++---
12 diff --git a/gfx/gl/GLLibraryLoader.cpp b/gfx/gl/GLLibraryLoader.cpp
14 --- a/gfx/gl/GLLibraryLoader.cpp
15 +++ b/gfx/gl/GLLibraryLoader.cpp
H A D0001-Mark-GLFeature-framebuffer_multisample-as-unsupporte.patch9 gfx/gl/GLContext.cpp | 10 ++++++++++
12 diff --git a/gfx/gl/GLContext.cpp b/gfx/gl/GLContext.cpp
14 --- a/gfx/gl/GLContext.cpp
15 +++ b/gfx/gl/GLContext.cpp
/OK3568_Linux_fs/yocto/poky/meta-yocto-bsp/recipes-bsp/gma500-gfx-check/
H A Dgma500-gfx-check_1.0.bb6 SRC_URI = "file://gma500-gfx-check.conf \
7 file://gma500-gfx-check.sh "
11 install -m 755 ${WORKDIR}/gma500-gfx-check.sh ${D}${sysconfdir}/modprobe.d/gma500-gfx-check.sh
12 … install -m 644 ${WORKDIR}/gma500-gfx-check.conf ${D}${sysconfdir}/modprobe.d/gma500-gfx-check.conf
15 FILES:${PN}="${sysconfdir}/modprobe.d/gma500-gfx-check.conf \
16 ${sysconfdir}/modprobe.d/gma500-gfx-check.sh"
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/gpu/
H A Daspeed-gfx.txt1 Device tree configuration for the GFX display device on the ASPEED SoCs
6 + aspeed,ast2500-gfx
7 + aspeed,ast2400-gfx
11 - reg: Physical base address and length of the GFX registers
13 - interrupts: interrupt number for the GFX device
17 - resets: reset line that must be released to use the GFX device
26 gfx: display@1e6e6000 {
27 compatible = "aspeed,ast2500-gfx", "syscon";
/OK3568_Linux_fs/buildroot/package/ti-gfx/
H A Dti-gfx.mk3 # ti-gfx
152 $(INSTALL) -D -m 0644 package/ti-gfx/egl.pc \
154 $(INSTALL) -D -m 0644 package/ti-gfx/glesv2.pc \
168 $(INSTALL) -D -m 0755 package/ti-gfx/esrev.sh \
175 $(INSTALL) -D -m 0644 package/ti-gfx/powervr.ini \
190 $(INSTALL) -D -m 0755 package/ti-gfx/S80ti-gfx \
191 $(TARGET_DIR)/etc/init.d/S80ti-gfx
195 $(INSTALL) -D -m 755 package/ti-gfx/S80ti-gfx \
196 $(TARGET_DIR)/usr/lib/systemd/scripts/ti-gfx
197 $(INSTALL) -D -m 644 package/ti-gfx/ti-gfx.service \
[all …]
H A DConfig.in2 bool "ti-gfx"
24 default "ti-gfx"
27 default "ti-gfx"
30 default "ti-gfx"
82 comment "ti-gfx needs a glibc toolchain and a Linux kernel to be built"
/OK3568_Linux_fs/buildroot/package/glslsandbox-player/
H A Dglslsandbox-player.mk43 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=kms
46 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=mali
49 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=nullws
52 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=rpi
55 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=sdl2
58 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=tisgx
61 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=vivfb
64 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=wl
72 GLSLSANDBOX_PLAYER_CONF_OPTS += --with-native-gfx=x11
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Daspeed-gfx.txt1 * Device tree bindings for Aspeed SoC Display Controller (GFX)
8 - compatible: "aspeed,ast2500-gfx", "syscon"
9 - reg: contains offset/length value of the GFX memory
14 gfx: display@1e6e6000 {
15 compatible = "aspeed,ast2500-gfx", "syscon";
/OK3568_Linux_fs/yocto/meta-browser/meta-firefox/recipes-browser/firefox/firefox/fixes/
H A D0003-Fix-build-with-Werror-Wunused-but-set-variable.patch8 firefox/68.9.0esr-r0/firefox-68.9.0/gfx/harfbuzz/src/hb-subset-cff1.cc:467:33: error: variable 'sup…
12 gfx/harfbuzz/src/hb-subset-cff1.cc | 4 +---
15 diff --git a/gfx/harfbuzz/src/hb-subset-cff1.cc b/gfx/harfbuzz/src/hb-subset-cff1.cc
17 --- a/gfx/harfbuzz/src/hb-subset-cff1.cc
18 +++ b/gfx/harfbuzz/src/hb-subset-cff1.cc
/OK3568_Linux_fs/yocto/meta-openembedded/meta-oe/recipes-graphics/directfb/directfb/
H A D0001-gfx-direct-Aboid-usng-VLAs-and-printf-formats.patch4 Subject: [PATCH] gfx,direct: Aboid usng VLAs and printf formats
17 src/gfx/util.cpp | 8 ++++----
33 diff --git a/src/gfx/util.cpp b/src/gfx/util.cpp
35 --- a/src/gfx/util.cpp
36 +++ b/src/gfx/util.cpp

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