Home
last modified time | relevance | path

Searched +full:full +full:- +full:frame (Results 1 – 25 of 1197) sorted by relevance

12345678910>>...48

/OK3568_Linux_fs/kernel/Documentation/userspace-api/media/v4l/
H A Dpixfmt-compressed.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
8 .. _compressed-formats:
12 .. flat-table:: Compressed Image Formats
13 :header-rows: 1
14 :stub-columns: 0
17 * - Identifier
18 - Code
19 - Details
20 * .. _V4L2-PIX-FMT-JPEG:
22 - ``V4L2_PIX_FMT_JPEG``
[all …]
H A Ddev-encoder.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
6 Memory-to-Memory Stateful Video Encoder Interface
12 further post-processing by the client.
34 5. Single-planar API (see :ref:`planar-apis`) and applicable structures may be
35 used interchangeably with multi-planar API, unless specified otherwise,
47 Refer to :ref:`decoder-glossary`.
52 .. kernel-render:: DOT
65 qi -> Initialization [ label = "open()" ];
67 Initialization -> Encoding [ label = "Both queues streaming" ];
69 Encoding -> Drain [ label = "V4L2_ENC_CMD_STOP" ];
[all …]
/OK3568_Linux_fs/kernel/drivers/usb/dwc2/
H A Dhcd.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * hcd.h - DesignWare HS OTG Controller host-mode declarations
5 * Copyright (C) 2004-2013 Synopsys, Inc.
16 * 3. The names of the above-listed copyright holders may not be used
53 * struct dwc2_host_chan - Software host channel descriptor
60 * - USB_SPEED_LOW
61 * - USB_SPEED_FULL
62 * - USB_SPEED_HIGH
64 * - USB_ENDPOINT_XFER_CONTROL: 0
65 * - USB_ENDPOINT_XFER_ISOC: 1
[all …]
H A Dcore.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * core.h - DesignWare HS OTG Controller common declarations
5 * Copyright (C) 2004-2013 Synopsys, Inc.
16 * 3. The names of the above-listed copyright holders may not be used
50 * - no_printk: Disable tracing
51 * - pr_info: Print this info to the console
52 * - trace_printk: Print this info to trace buffer (good for verbose logging)
61 dev_name(hsotg->dev), ##__VA_ARGS__)
66 dev_name(hsotg->dev), ##__VA_ARGS__)
71 /* dwc2-hsotg declarations */
[all …]
H A Dhcd_queue.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * hcd_queue.c - DesignWare HS OTG Controller host queuing routines
5 * Copyright (C) 2004-2013 Synopsys, Inc.
16 * 3. The names of the above-listed copyright holders may not be used
47 #include <linux/dma-mapping.h>
65 * dwc2_periodic_channel_available() - Checks that a channel is available for a
77 * non-periodic transactions in dwc2_periodic_channel_available()
82 num_channels = hsotg->params.host_channels; in dwc2_periodic_channel_available()
83 if ((hsotg->periodic_channels + hsotg->non_periodic_channels < in dwc2_periodic_channel_available()
84 num_channels) && (hsotg->periodic_channels < num_channels - 1)) { in dwc2_periodic_channel_available()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac1000.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 Copyright (C) 2007-2009 STMicroelectronics Ltd
15 #define GMAC_FRAME_FILTER 0x00000004 /* Frame Filter */
23 #define GMAC_WAKEUP_FILTER 0x00000028 /* Wake-up Frame Filter */
79 #define GMAC_ADDR_HIGH(reg) ((reg > 15) ? 0x00000800 + (reg - 16) * 8 : \
81 #define GMAC_ADDR_LOW(reg) ((reg > 15) ? 0x00000804 + (reg - 16) * 8 : \
108 #define GMAC_CONTROL_BE 0x00200000 /* Frame Burst Enable */
109 #define GMAC_CONTROL_JE 0x00100000 /* Jumbo frame */
119 #define GMAC_CONTROL_LM 0x00001000 /* Loop-back mode */
132 /* GMAC Frame Filter defines */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/
H A Divc.c4 * SPDX-License-Identifier: GPL-2.0
9 #include <asm/arch-tegra/ivc.h>
50 * This structure is divided into two-cache aligned parts, the first is only
53 * which is critical to performance and necessary in non-cache coherent
90 uint32_t frame) in tegra_ivc_frame_addr() argument
92 BUG_ON(frame >= ivc->nframes); in tegra_ivc_frame_addr()
95 (ivc->frame_size * frame); in tegra_ivc_frame_addr()
100 uint32_t frame) in tegra_ivc_frame_pointer() argument
102 return (void *)tegra_ivc_frame_addr(ivc, ch, frame); in tegra_ivc_frame_pointer()
107 unsigned frame) in tegra_ivc_invalidate_frame() argument
[all …]
/OK3568_Linux_fs/kernel/drivers/firmware/tegra/
H A Divc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
47 * This structure is divided into two-cache aligned parts, the first is only
50 * lines, which is critical to performance and necessary in non-cache coherent
73 if (!ivc->peer) in tegra_ivc_invalidate()
76 dma_sync_single_for_cpu(ivc->peer, phys, TEGRA_IVC_ALIGN, in tegra_ivc_invalidate()
82 if (!ivc->peer) in tegra_ivc_flush()
85 dma_sync_single_for_device(ivc->peer, phys, TEGRA_IVC_ALIGN, in tegra_ivc_flush()
97 u32 tx = READ_ONCE(header->tx.count); in tegra_ivc_empty()
98 u32 rx = READ_ONCE(header->rx.count); in tegra_ivc_empty()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/
H A Dfec.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * fec.h -- Fast Ethernet Controller for Motorola ColdFire SoC
8 * (C) Copyright 2000-2005, Greg Ungerer (gerg@snapgear.com)
9 * (C) Copyright 2000-2001, Lineo (www.lineo.com)
35 #define FEC_MII_DATA 0x040 /* MII manage frame reg */
65 #define FEC_R_FIFO_RSFL 0x190 /* Receive FIFO section full threshold */
68 #define FEC_R_FIFO_RAFL 0x19c /* Receive FIFO almost full threshold */
69 #define FEC_FTRL 0x1b0 /* Frame truncation receive length*/
154 #define FEC_MII_DATA 0x040 /* MII manage frame reg */
161 #define FEC_MAX_FRM_LEN 0x108 /* Maximum frame length reg */
[all …]
/OK3568_Linux_fs/kernel/Documentation/networking/device_drivers/ethernet/dlink/
H A Ddl2k.rst1 .. SPDX-License-Identifier: GPL-2.0
4 D-Link DL2000-based Gigabit Ethernet Adapter Installation
11 - Compatibility List
12 - Quick Install
13 - Compiling the Driver
14 - Installing the Driver
15 - Option parameter
16 - Configuration Script Sample
17 - Troubleshooting
25 - D-Link DGE-550T Gigabit Ethernet Adapter.
[all …]
/OK3568_Linux_fs/buildroot/dl/sox/git/lpc10/
H A Dvoicin.c17 /* -- translated by f2c (version 19951025).
19 -lf2c -lm (in that order)
95 /* frame times. It would still be good to choose initial values for */
118 /* frame of input speech. Tentative voicing decisions are made two frames*/
119 /* in the future (2F) for each half frame. These decisions are carried */
120 /* through one frame in the future (1F) to the present (P) frame where */
122 /* decisions for each half frame. */
126 /* AMDF windowed maximum-to-minimum ratio, the zero crossing rate, energy*/
134 /* (VALUE). The VDC vector is 2-dimensional, each row vector is optimized*/
135 /* for a particular signal-to-noise ratio (SNR). So, before the dot */
[all …]
/OK3568_Linux_fs/kernel/Documentation/fb/
H A Dframebuffer.rst2 The Frame Buffer Device
9 ---------------
11 The frame buffer device provides an abstraction for the graphics hardware. It
12 represents the frame buffer of some video hardware and allows application
13 software to access the graphics hardware through a well-defined interface, so
14 the software doesn't need to know anything about the low-level (hardware
22 --------------------------
24 From the user's point of view, the frame buffer device looks just like any
26 specifies the frame buffer number.
31 0 = /dev/fb0 First frame buffer
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c81 (0x13830 - 0x7030) >> 2,
128 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
131 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_rreg()
141 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_wreg()
144 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v8_0_audio_endpt_wreg()
149 if (crtc >= adev->mode_info.num_crtc) in dce_v8_0_vblank_get_counter()
160 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v8_0_pageflip_interrupt_init()
161 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v8_0_pageflip_interrupt_init()
169 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v8_0_pageflip_interrupt_fini()
170 amdgpu_irq_put(adev, &adev->pageflip_irq, i); in dce_v8_0_pageflip_interrupt_fini()
[all …]
H A Ddce_v11_0.c161 switch (adev->asic_type) { in dce_v11_0_init_golden_registers()
198 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
201 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_rreg()
211 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_wreg()
214 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v11_0_audio_endpt_wreg()
219 if (crtc < 0 || crtc >= adev->mode_info.num_crtc) in dce_v11_0_vblank_get_counter()
230 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v11_0_pageflip_interrupt_init()
231 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v11_0_pageflip_interrupt_init()
239 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v11_0_pageflip_interrupt_fini()
240 amdgpu_irq_put(adev, &adev->pageflip_irq, i); in dce_v11_0_pageflip_interrupt_fini()
[all …]
H A Ddce_v10_0.c152 switch (adev->asic_type) { in dce_v10_0_init_golden_registers()
180 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
183 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_rreg()
193 spin_lock_irqsave(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_wreg()
196 spin_unlock_irqrestore(&adev->audio_endpt_idx_lock, flags); in dce_v10_0_audio_endpt_wreg()
201 if (crtc >= adev->mode_info.num_crtc) in dce_v10_0_vblank_get_counter()
212 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v10_0_pageflip_interrupt_init()
213 amdgpu_irq_get(adev, &adev->pageflip_irq, i); in dce_v10_0_pageflip_interrupt_init()
221 for (i = 0; i < adev->mode_info.num_crtc; i++) in dce_v10_0_pageflip_interrupt_fini()
222 amdgpu_irq_put(adev, &adev->pageflip_irq, i); in dce_v10_0_pageflip_interrupt_fini()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/fddi/skfp/h/
H A Dsupern_2.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
40 * FORMAC frame status (rx_msext)
47 #define FS_MSRABT (1<<14) /* frame was aborted during reception*/
48 #define FS_SSRCRTG (1<<12) /* if SA has set MSB (source-routing)*/
54 #define FS_SFRMTY2 (1<<6) /* frame-class bit */
55 #define FS_SFRMTY1 (1<<5) /* frame-type bit (impementor) */
56 #define FS_SFRMTY0 (1<<4) /* frame-type bit (LLC) */
58 #define FS_ERFBB0 (1<<0) /* - " - */
61 * status frame type
71 * bits in rx_descr.i (receive frame status word)
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/
H A Ddrm_debugfs_crc.c45 * DRM device drivers can provide to userspace CRC information of each frame as
49 * file dri/0/crtc-N/crc/control in debugfs, with N being the index of the CRTC.
50 * Accepted values are source names (which are driver-specific) and the "auto"
51 * keyword, which will let the driver select a default source of frame CRCs
54 * Once frame CRC generation is enabled, userspace can capture them by reading
55 * the dri/0/crtc-N/crc/data file. Each line in that file contains the frame
58 * of CRC fields is source-specific.
61 * the frame contents as supplied by userspace (eDP 1.3), in general the CRC
62 * computation is performed in an unspecified way and on frame contents that have
64 * rely on being able to generate matching CRC values for the frame contents that
[all …]
/OK3568_Linux_fs/kernel/drivers/usb/c67x00/
H A Dc67x00-hcd.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * c67x00-hcd.h: Cypress C67X00 USB HCD
5 * Copyright (C) 2006-2008 Barco N.V.
37 * frames; there are 12000 bit times per frame.
43 #define MAX_FRAME_BW_STD (TOTAL_FRAME_BW - DEFAULT_EOT)
47 * Periodic transfers may only use 90% of the full frame, but as
48 * we currently don't even use 90% of the full frame, we may
49 * use the full usable time for periodic transfers.
53 /* -------------------------------------------------------------------------- */
89 return (struct c67x00_hcd *)(hcd->hcd_priv); in hcd_to_c67x00_hcd()
[all …]
/OK3568_Linux_fs/kernel/drivers/video/fbdev/
H A Dc2p_planar.c2 * Fast C2P (Chunky-to-Planar) Conversion
4 * Copyright (C) 2003-2008 Geert Uytterhoeven
21 * Perform a full C2P step on 32 8-bit pixels, stored in 8 32-bit words
23 * - 32 8-bit chunky pixels on input
24 * - permutated planar data (1 plane per 32-bit word) on output
45 * Store a full block of planar data after c2p conversion
74 * c2p_planar - Copy 8-bit chunky image data to a planar frame buffer
75 * @dst: Starting address of the planar frame buffer
80 * @dst_nextline: Frame buffer offset to the next line (in bytes)
81 * @dst_nextplane: Frame buffer offset to the next plane (in bytes)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/freescale/fs_enet/
H A Dfec.h1 /* SPDX-License-Identifier: GPL-2.0 */
13 #define FEC_ENET_TXF 0x08000000U /* Full frame transmitted */
15 #define FEC_ENET_RXF 0x02000000U /* Full frame received */
/OK3568_Linux_fs/kernel/drivers/usb/host/
H A Duhci-hcd.c1 // SPDX-License-Identifier: GPL-2.0
8 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
15 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
16 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
17 * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
40 #include <linux/dma-mapping.h>
50 #include "uhci-hcd.h"
97 * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
99 static __hc32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) in uhci_frame_skel_link() argument
105 * There's not much to be done about period-1 interrupts; they have in uhci_frame_skel_link()
[all …]
H A Dehci-sched.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (c) 2001-2004 by David Brownell
4 * Copyright (c) 2003 Michal Sojka, for high-speed iso transfers
7 /* this file is part of ehci-hcd.c */
9 /*-------------------------------------------------------------------------*/
21 * pre-calculated schedule data to make appending to the queue be quick.
27 * periodic_next_shadow - return "next" pointer on shadow list
37 return &periodic->qh->qh_next; in periodic_next_shadow()
39 return &periodic->fstn->fstn_next; in periodic_next_shadow()
41 return &periodic->itd->itd_next; in periodic_next_shadow()
[all …]
/OK3568_Linux_fs/kernel/drivers/mailbox/
H A Dbcm-pdc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
42 #include <linux/mailbox/brcm-message.h>
44 #include <linux/dma-direction.h>
45 #include <linux/dma-mapping.h>
73 #define PREVTXD(i, max_mask) TXD((i) - 1, (max_mask))
75 #define PREVRXD(i, max_mask) RXD((i) - 1, (max_mask))
76 #define NTXDACTIVE(h, t, max_mask) TXD((t) - (h), (max_mask))
77 #define NRXDACTIVE(h, t, max_mask) RXD((t) - (h), (max_mask))
105 * before frame
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 1999 - 2010 Intel Corporation.
26 * pch_gbe_regs_mac_adr - Structure holding values of mac address registers
35 * pch_udc_regs - Structure holding values of MAC registers
95 #define PCH_GBE_INT_RX_FRAME_ERR 0x00000004 /* Receive frame error */
113 #define PCH_GBE_MODE_FULL_DUPLEX 0x40000000 /* Duplex Mode [full duplex] */
114 #define PCH_GBE_MODE_FR_BST 0x04000000 /* Frame bursting is done */
145 /* Receive Almost Full Threshold */
208 /* Frame Start Threshold */
222 /* Transmit Almost Full Threshold */
[all …]
/OK3568_Linux_fs/kernel/drivers/net/ethernet/dec/tulip/
H A Dde4x5.h16 #define DE4X5_BMR iobase+(0x000 << lp->bus) /* Bus Mode Register */
17 #define DE4X5_TPD iobase+(0x008 << lp->bus) /* Transmit Poll Demand Reg */
18 #define DE4X5_RPD iobase+(0x010 << lp->bus) /* Receive Poll Demand Reg */
19 #define DE4X5_RRBA iobase+(0x018 << lp->bus) /* RX Ring Base Address Reg */
20 #define DE4X5_TRBA iobase+(0x020 << lp->bus) /* TX Ring Base Address Reg */
21 #define DE4X5_STS iobase+(0x028 << lp->bus) /* Status Register */
22 #define DE4X5_OMR iobase+(0x030 << lp->bus) /* Operation Mode Register */
23 #define DE4X5_IMR iobase+(0x038 << lp->bus) /* Interrupt Mask Register */
24 #define DE4X5_MFC iobase+(0x040 << lp->bus) /* Missed Frame Counter */
25 #define DE4X5_APROM iobase+(0x048 << lp->bus) /* Ethernet Address PROM */
[all …]

12345678910>>...48