| /OK3568_Linux_fs/kernel/drivers/cpufreq/ |
| H A D | imx-cpufreq-dt.c | 43 FIRC, enumerator
52 { .id = "firc" },
58 return clk_get_rate(imx7ulp_clks[FIRC].clk); in imx7ulp_get_intermediate()
66 clk_set_parent(imx7ulp_clks[SCS_SEL].clk, imx7ulp_clks[FIRC].clk); in imx7ulp_target_intermediate()
67 clk_set_parent(imx7ulp_clks[HSRUN_SCS_SEL].clk, imx7ulp_clks[FIRC].clk); in imx7ulp_target_intermediate()
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| /OK3568_Linux_fs/kernel/drivers/reset/ |
| H A D | reset-lpc18xx.c | 143 u32 fcclk, firc; in lpc18xx_rgu_probe() local
180 firc = clk_get_rate(rc->clk_delay) / USEC_PER_SEC; in lpc18xx_rgu_probe()
181 if (fcclk == 0 || firc == 0) in lpc18xx_rgu_probe()
184 rc->delay_us = DIV_ROUND_UP(fcclk, firc * firc); in lpc18xx_rgu_probe()
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| /OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx7ulp/ |
| H A D | scg.c | 1002 /* SCG1(A7) FIRC DIV configurations */
1003 /* Disable FIRC DIV3 */
1005 /* FIRC DIV2 = 48MHz / 1 = 48MHz */
1007 /* Disable FIRC DIV1 */
1012 /* Wait for FIRC clock ready */ in scg_a7_firc_init()
1016 /* Configure A7 FIRC DIV1 ~ DIV3 */ in scg_a7_firc_init()
1044 /* SCG1(A7) FIRC DIV configurations */
1045 /* Enable FIRC DIV3 */
1047 /* FIRC DIV2 = 48MHz / 1 = 48MHz */
1049 /* Enable FIRC DIV1 */
[all …]
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| H A D | clock.c | 79 /* Set parent to FIRC DIV2 clock */ in enable_i2c_clk()
283 * A4 side: SIRC 16Mhz (DIV1-3 off), FIRC 48Mhz (DIV1-2 on), in clock_init()
291 * 1. Enable PFD1-3 of APLL for A7 side. Enable FIRC and DIVs. in clock_init()
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| H A D | pcc.c | 31 SCG_FIRC_DIV2_CLK, /* FIRC BUS clock */
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ |
| H A D | imx7ulp-scg-clock.yaml | 63 - const: firc
84 <&firc>, <&upll>;
86 "firc", "upll";
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| /OK3568_Linux_fs/kernel/drivers/clk/imx/ |
| H A D | clk-imx7ulp.c | 22 static const char * const pll_pre_sels[] = { "sosc", "firc", };
27 static const char * const scs_sels[] = { "dummy", "sosc", "sirc", "firc", "dummy", "apll_sel", "sp…
29 static const char * const nic_sels[] = { "firc", "ddr_clk", };
34 /* used by sosc/sirc/firc/ddr/spll/apll dividers */
65 hws[IMX7ULP_CLK_FIRC] = imx_obtain_fixed_clk_hw(np, "firc"); in imx7ulp_clk_scg1_init()
126 …hws[IMX7ULP_CLK_FIRC_BUS_CLK] = imx_clk_hw_divider_gate("firc_bus_clk", "firc", 0, base + 0x304, 8… in imx7ulp_clk_scg1_init()
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| H A D | clk-vf610.c | 72 static const char *fast_sels[] = { "firc", "fxosc", };
187 clk[VF610_CLK_FIRC] = imx_clk_fixed("firc", 24000000); in vf610_clocks_init()
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | imx7ulp.dtsi | 76 firc: clock-firc { label
79 clock-output-names = "firc";
250 <&firc>, <&upll>;
252 "firc", "upll";
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| /OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx7ulp/ |
| H A D | scg.h | 95 * FIRC/SIRC DIV1 ==> xIRC_PLAT_CLK
96 * FIRC/SIRC DIV2 ==> xIRC_BUS_CLK
97 * FIRC/SIRC DIV3 ==> xIRC_SLOW_CLK
188 /* 0: Sys-OSC, 1: FIRC */
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | imx7ulp.dtsi | 101 firc: clock@3 { label
105 clock-output-names = "firc";
376 <&firc>, <&upll>, <&mpll>;
378 "firc", "upll", "mpll";
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| /OK3568_Linux_fs/u-boot/board/freescale/s32v234evb/ |
| H A D | clock.c | 16 * refclk_freq - input referece clock frequency (FXOSC - 40 MHZ, FIRC - 48 MHZ)
70 * refclk_freq - input reference clock frequency (FXOSC - 40 MHZ, FIRC - 48 MHZ)
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| /OK3568_Linux_fs/prebuilts/gcc/linux-x86/arm/gcc-arm-10.3-2021.07-x86_64-arm-none-linux-gnueabihf/arm-none-linux-gnueabihf/libc/usr/lib/gconv/ |
| HD | libJISX0213.so | __gmon_start__ _ITM_deregisterTMCloneTable _ITM_registerTMCloneTable __cxa_finalize __jisx0213_from_ucs_level2 __jisx0213_from_ucs_level1 __jisx0213_to_ucs_pagestart __jisx0213_to_ucs_main __jisx0213_to_ucs_combining libc.so.6 libJISX0213.so GLIBC_2. ... |