Searched +full:charge +full:- +full:current +full:- +full:limit +full:- +full:mapping (Results 1 – 25 of 79) sorted by relevance
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1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/power/supply/gpio-charger.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Sebastian Reichel <sre@kernel.org>19 const: gpio-charger21 charger-type:23 - unknown24 - battery25 - ups[all …]
1 Binding for TI bq24250/bq24251/bq24257 Li-Ion Charger4 - compatible: Should contain one of the following:8 - reg: integer, i2c address of the device.9 - interrupts: Interrupt mapping for GPIO IRQ (configure for both edges). Use in10 conjunction with "interrupt-parent".11 - ti,battery-regulation-voltage: integer, maximum charging voltage in uV.12 - ti,charge-current: integer, maximum charging current in uA.13 - ti,termination-current: integer, charge will be terminated when current in14 constant-voltage phase drops below this value (in uA).17 - pg-gpios: GPIO used for connecting the bq2425x device PG (Power Good) pin.[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>18 #include <linux/power/gpio-charger.h>58 struct gpio_mapping mapping; in set_charge_current_limit() local59 int ndescs = gpio_charger->current_limit_gpios->ndescs; in set_charge_current_limit()60 struct gpio_desc **gpios = gpio_charger->current_limit_gpios->desc; in set_charge_current_limit()63 if (!gpio_charger->current_limit_map_size) in set_charge_current_limit()64 return -EINVAL; in set_charge_current_limit()66 for (i = 0; i < gpio_charger->current_limit_map_size; i++) { in set_charge_current_limit()67 if (gpio_charger->current_limit_map[i].limit_ua <= val) in set_charge_current_limit()[all …]
1 // SPDX-License-Identifier: GPL-2.0-only21 #include <linux/extcon-provider.h>34 #define BQ24190_REG_POC 0x01 /* Power-On Configuration */52 #define BQ24190_REG_CCC 0x02 /* Charge Current Control */59 #define BQ24190_REG_PCTCC 0x03 /* Pre-charge/Termination Current Cntl */71 #define BQ24190_REG_CVC 0x04 /* Charge Voltage Control */80 #define BQ24190_REG_CTTC 0x05 /* Charge Term/Timer Control */154 * reads return the current value. In order to return the fault status183 * The tables below provide a 2-way mapping for the value that goes in184 * the register field and the real-world value that it represents.[all …]
1 // SPDX-License-Identifier: GPL-2.07 * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>19 * https://www.ti.com/product/bq27510-g120 * https://www.ti.com/product/bq27510-g221 * https://www.ti.com/product/bq27510-g322 * https://www.ti.com/product/bq27520-g123 * https://www.ti.com/product/bq27520-g224 * https://www.ti.com/product/bq27520-g325 * https://www.ti.com/product/bq27520-g426 * https://www.ti.com/product/bq27530-g1[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * mm/page-writeback.c25 #include <linux/backing-dev.h>57 #define DIRTY_POLL_THRESH (128 >> (PAGE_SHIFT - 10))103 * The interval between `kupdate'-style writebacks127 /* End of sysctl-exported parameters */145 unsigned long wb_dirty; /* per-wb counterparts */155 * reflect changes in current writeout rate.163 .wb_completions = &(__wb)->completions169 .wb_completions = &(__wb)->memcg_completions, \[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later2 /* memcontrol.c - Memory Controller19 * Charge lifetime sanitation35 #include <linux/page-flags.h>36 #include <linux/backing-dev.h>107 * Cgroups above their limits are maintained in a RB-Tree, independent of199 * limit reclaim to prevent infinite loops, if they ever occur.204 /* for encoding cft->private value on file */236 return tsk_is_oom_victim(current) || fatal_signal_pending(current) || in task_is_dying()237 (current->flags & PF_EXITING); in task_is_dying()[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 /dts-v1/;8 #include "rv1126-bat-ipc.dtsi"9 #include "rv1126-thunder-boot-emmc.dtsi"10 #include <dt-bindings/input/input.h>14 compatible = "rockchip,rv1126-bat-ipc-v10", "rockchip,rv1126";16 adc-keys {17 compatible = "adc-keys";18 io-channels = <&saradc 0>;19 io-channel-names = "buttons";[all …]
4 * Permission is hereby granted, free of charge, to any person obtaining a70 #define SVM_DBG(s,f,a...) NV_DEBUG((s)->drm, "svm: "f"\n", ##a)71 #define SVM_ERR(s,f,a...) NV_WARN((s)->drm, "svm: "f"\n", ##a)89 list_for_each_entry(ivmm, &svm->inst, head) { in nouveau_ivmm_find()90 if (ivmm->inst == inst) in nouveau_ivmm_find()97 NV_DEBUG((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a)99 NV_WARN((s)->vmm->cli->drm, "svm-%p: "f"\n", (s), ##a)111 args->va_start &= PAGE_MASK; in nouveau_svmm_bind()112 args->va_end = ALIGN(args->va_end, PAGE_SIZE); in nouveau_svmm_bind()115 if (args->reserved0 || args->reserved1) in nouveau_svmm_bind()[all …]
4 * Permission is hereby granted, free of charge, to any person obtaining a56 * System Unified Address - SUA60 * a combination of vidMM/driver software components. The current virtual80 * HSA64 - ATC/IOMMU 64b90 * unified address” feature (SUA) is the mapping of GPUVM and ATC address112 * A 64b pointer is compared to the apertures that are defined (Base/Limit), in137 * In all cases (no matter where the 64b -> 49b conversion is done), the gfxip154 * The default aperture isn’t an actual base/limit aperture; it is just the155 * address space that doesn’t hit any defined base/limit apertures.163 * An aperture register definition consists of a Base, Limit, Mtype, and[all …]
4 * Permission is hereby granted, free of charge, to any person obtaining a46 * Each signal event needs a 64-bit signal slot where the signaler will write61 return page->kernel_address; in page_slots()82 page->kernel_address = backing_store; in allocate_signal_page()83 page->need_to_free_pages = true; in allocate_signal_page()99 if (!p->signal_page) { in allocate_event_notification_slot()100 p->signal_page = allocate_signal_page(p); in allocate_event_notification_slot()101 if (!p->signal_page) in allocate_event_notification_slot()102 return -ENOMEM; in allocate_event_notification_slot()104 p->signal_mapped_size = 256*8; in allocate_event_notification_slot()[all …]
4 * Permission is hereby granted, free of charge, to any person obtaining a38 /* Size of the per-pipe EOP queue */75 int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec in is_pipe_enabled()76 + pipe * dqm->dev->shared_resources.num_queue_per_pipe; in is_pipe_enabled()79 for (i = 0; i < dqm->dev->shared_resources.num_queue_per_pipe; ++i) in is_pipe_enabled()81 dqm->dev->shared_resources.cp_queue_bitmap)) in is_pipe_enabled()88 return bitmap_weight(dqm->dev->shared_resources.cp_queue_bitmap, in get_cp_queues_num()94 return dqm->dev->shared_resources.num_queue_per_pipe; in get_queues_per_pipe()99 return dqm->dev->shared_resources.num_pipe_per_mec; in get_pipes_per_mec()104 return dqm->dev->device_info->num_sdma_engines; in get_num_sdma_engines()[all …]
4 * Permission is hereby granted, free of charge, to any person obtaining a44 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)45 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)46 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)47 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)48 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)49 #define MAX_UCLK_DPM_LEVEL (NUM_UCLK_DPM_LEVELS - 1)50 #define MAX_FCLK_DPM_LEVEL (NUM_FCLK_DPM_LEVELS - 1)51 #define MAX_XGMI_LEVEL (NUM_XGMI_LEVELS - 1)52 #define MAX_XGMI_PSTATE_LEVEL (NUM_XGMI_PSTATE_LEVELS - 1)[all …]
4 * Permission is hereby granted, free of charge, to any person obtaining a50 #define MAX_GFXCLK_DPM_LEVEL (NUM_GFXCLK_DPM_LEVELS - 1)51 #define MAX_SMNCLK_DPM_LEVEL (NUM_SMNCLK_DPM_LEVELS - 1)52 #define MAX_SOCCLK_DPM_LEVEL (NUM_SOCCLK_DPM_LEVELS - 1)53 #define MAX_MP0CLK_DPM_LEVEL (NUM_MP0CLK_DPM_LEVELS - 1)54 #define MAX_DCLK_DPM_LEVEL (NUM_DCLK_DPM_LEVELS - 1)55 #define MAX_VCLK_DPM_LEVEL (NUM_VCLK_DPM_LEVELS - 1)56 #define MAX_DCEFCLK_DPM_LEVEL (NUM_DCEFCLK_DPM_LEVELS - 1)57 #define MAX_DISPCLK_DPM_LEVEL (NUM_DISPCLK_DPM_LEVELS - 1)58 #define MAX_PIXCLK_DPM_LEVEL (NUM_PIXCLK_DPM_LEVELS - 1)[all …]
1 // SPDX-License-Identifier: GPL-2.0-only9 * 'fork.c' contains the help-routines for the 'fork' system call83 #include <linux/posix-timers.h>84 #include <linux/user-return-notifier.h>132 static int max_threads; /* tunable limit on nr_threads */212 vfree(vm_stack->addr); in free_vm_stack_cache()235 kasan_unpoison_range(s->addr, THREAD_SIZE); in alloc_thread_stack_node()238 memset(s->addr, 0, THREAD_SIZE); in alloc_thread_stack_node()240 tsk->stack_vm_area = s; in alloc_thread_stack_node()241 tsk->stack = s->addr; in alloc_thread_stack_node()[all …]
1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */3 * Copyright 1998-2015 VMware, Inc.5 * Permission is hereby granted, free of charge, to any person28 * svga_reg.h --72 * Legal values for the SVGA_REG_CURSOR_ON register in old-fashioned90 * the full framebuffer can be traced independent of this limit.139 * The byte-size is the size of the actual cursor data,140 * possibly after expanding it to the current bit depth.142 * 40K is sufficient memory for two 32-bit planes for a 64 x 64 cursor.144 * The dimension limit is a bound on the maximum width or height.[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later8 * - implement DAPM and input muxing9 * - implement modulation limit10 * - implement non-default PWM start13 * because the registers are of unequal size, and multi-byte registers18 * it doesn't matter because the entire map can be accessed as 8-bit21 * routines have to be open-coded.71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */73 #define TAS5086_MOD_LIMIT 0x10 /* Modulation limit register */76 #define TAS5086_SPLIT_CAP_CHARGE 0x1a /* Split cap charge period register */[all …]
1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */4 * (C) COPYRIGHT 2018-2023 ARM Limited. All rights reserved.18 * http://www.gnu.org/licenses/gpl-2.0.html.64 * enum kbase_csf_queue_bind_state - bind state of the queue80 * enum kbase_csf_reset_gpu_state - state of the gpu reset117 * enum kbase_csf_group_state - state of the GPU command queue group123 * and is subjected to time-slice based134 * slots left after scheduling non-idle148 * to time-slice based scheduling. A resume150 * re-assigned to the group and once the[all …]
2 * Copyright 2014-2018 Advanced Micro Devices, Inc.4 * Permission is hereby granted, free of charge, to any person obtaining a22 #include <linux/dma-buf.h>42 /* Impose limit on how much memory KFD can use */60 #define domain_string(domain) domain_bit_to_string[ffs(domain)-1]75 list_for_each_entry(entry, &mem->bo_va_list, bo_list) in check_if_add_bo_to_vm()76 if (entry->bo_va->base.vm == avm) in check_if_add_bo_to_vm()82 /* Set memory usage limits. Current, limits are83 * System (TTM + userptr) memory - 15/16th System RAM84 * TTM memory - 3/8th System RAM[all …]
... acsc with odd length in dump_entry in check for one-one 80+ mapping (cf: 20060415); ...
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1 /* SPDX-License-Identifier: GPL-2.0-only */7 * NOTE: This file is auto-generated from ChromeOS EC Open Source code from22 * Current version of this protocol52 * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */74 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */75 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */77 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */78 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */79 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */[all …]
5 * Permission is hereby granted, free of charge, to any person obtaining a15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL72 INIT_DELAYED_WORK(&rdev->uvd.idle_work, radeon_uvd_idle_work_handler); in radeon_uvd_init()74 switch (rdev->family) { in radeon_uvd_init()134 return -EINVAL; in radeon_uvd_init()137 rdev->uvd.fw_header_present = false; in radeon_uvd_init()138 rdev->uvd.max_handles = RADEON_DEFAULT_UVD_HANDLES; in radeon_uvd_init()141 r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev); in radeon_uvd_init()143 dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n", in radeon_uvd_init()146 struct common_firmware_header *hdr = (void *)rdev->uvd_fw->data; in radeon_uvd_init()[all …]
6 * Permission is hereby granted, free of charge, to any person obtaining a134 /* Acer aspire 5560g (CPU: AMD A4-3305M; GPU: AMD Radeon HD 6480g + 7470m)138 /* Asus K73TA laptop with AMD A6-3400M APU and Radeon 6550 GPU142 /* Asus K53TK laptop with AMD A6-3420M APU and Radeon 7670m GPU146 /* Asus K53TK laptop with AMD A6-3420M APU and Radeon 7670m GPU150 /* Asus K73TK laptop with AMD A6-3420M APU and Radeon 7670m GPU159 struct radeon_device *rdev = dev->dev_private; in radeon_is_px()161 if (rdev->flags & RADEON_IS_PX) in radeon_is_px()171 while (p && p->chip_device != 0) { in radeon_device_handle_px_quirks()172 if (rdev->pdev->vendor == p->chip_vendor && in radeon_device_handle_px_quirks()[all …]
6 * Copyright (c) 2005-2006, Christopher Clark7 * Copyright (c) 2004-2005, K A Fraser15 * Permission is hereby granted, free of charge, to any person obtaining a copy49 #include <linux/dma-mapping.h>57 #include <xen/hvc-console.h>58 #include <xen/swiotlb-xen.h>63 #include <xen/mem-reservation.h>99 * Mapping a list of frames for storing grant entries. Frames parameter163 /* This can be used as an l-value */175 ((rc = gnttab_expand(count - gnttab_free_count)) < 0)) { in get_free_entries()[all …]