xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/rv1126-bat-ipc-v10.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2020 Rockchip Electronics Co., Ltd.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun#include "rv1126.dtsi"
8*4882a593Smuzhiyun#include "rv1126-bat-ipc.dtsi"
9*4882a593Smuzhiyun#include "rv1126-thunder-boot-emmc.dtsi"
10*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun/ {
13*4882a593Smuzhiyun	model = "Rockchip RV1126 BAT IPC V10 Board";
14*4882a593Smuzhiyun	compatible = "rockchip,rv1126-bat-ipc-v10", "rockchip,rv1126";
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	adc-keys {
17*4882a593Smuzhiyun		compatible = "adc-keys";
18*4882a593Smuzhiyun		io-channels = <&saradc 0>;
19*4882a593Smuzhiyun		io-channel-names = "buttons";
20*4882a593Smuzhiyun		poll-interval = <100>;
21*4882a593Smuzhiyun		keyup-threshold-microvolt = <1800000>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		recovery {
24*4882a593Smuzhiyun			label = "Volum_up";
25*4882a593Smuzhiyun			linux,code = <KEY_VOLUMEUP>;
26*4882a593Smuzhiyun			press-threshold-microvolt = <0>;
27*4882a593Smuzhiyun		};
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun	cam_ircut0: cam_ircut {
31*4882a593Smuzhiyun		status = "okay";
32*4882a593Smuzhiyun		compatible = "ap1511a,ircut";
33*4882a593Smuzhiyun		pinctrl-names = "default";
34*4882a593Smuzhiyun		pinctrl-0 = <&ir_cut_en>;
35*4882a593Smuzhiyun		ircut-open-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
36*4882a593Smuzhiyun		led-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
37*4882a593Smuzhiyun		rockchip,camera-module-index = <1>;
38*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	charger {
42*4882a593Smuzhiyun		compatible = "gpio-charger";
43*4882a593Smuzhiyun		pinctrl-names = "default";
44*4882a593Smuzhiyun		pinctrl-0 = <&charger_io>;
45*4882a593Smuzhiyun		gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
46*4882a593Smuzhiyun		charger-type = "usb-dcp";
47*4882a593Smuzhiyun		charge-status-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>;
48*4882a593Smuzhiyun		charge-current-limit-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>,
49*4882a593Smuzhiyun					     <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
50*4882a593Smuzhiyun		charge-current-limit-mapping = <2000000 0x03>, <500000 0x00>;
51*4882a593Smuzhiyun		extcon = <&u2phy0>;
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	gpio-poweroff {
55*4882a593Smuzhiyun		compatible = "gpio-poweroff";
56*4882a593Smuzhiyun		gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>;
57*4882a593Smuzhiyun		pinctrl-names = "default";
58*4882a593Smuzhiyun		pinctrl-0 = <&power_hold>;
59*4882a593Smuzhiyun	};
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	i2s0_sound: i2s0-sound {
62*4882a593Smuzhiyun		status = "okay";
63*4882a593Smuzhiyun		compatible = "simple-audio-card";
64*4882a593Smuzhiyun		simple-audio-card,format = "i2s";
65*4882a593Smuzhiyun		simple-audio-card,mclk-fs = <256>;
66*4882a593Smuzhiyun		simple-audio-card,name = "rockchip,i2s0-sound";
67*4882a593Smuzhiyun		simple-audio-card,cpu {
68*4882a593Smuzhiyun			sound-dai = <&i2s0_8ch>;
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun		simple-audio-card,codec {
71*4882a593Smuzhiyun			sound-dai = <&es8311>;
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun	};
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	leds {
76*4882a593Smuzhiyun		compatible = "pwm-leds";
77*4882a593Smuzhiyun		blue {
78*4882a593Smuzhiyun			label = "blue";
79*4882a593Smuzhiyun			pwms = <&pwm3 0 50000 0>;
80*4882a593Smuzhiyun			max-brightness = <255>;
81*4882a593Smuzhiyun		};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun		red {
84*4882a593Smuzhiyun			label = "red";
85*4882a593Smuzhiyun			pwms = <&pwm2 0 50000 0>;
86*4882a593Smuzhiyun			max-brightness = <255>;
87*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun	};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun	pir {
92*4882a593Smuzhiyun		compatible = "aschip,pir";
93*4882a593Smuzhiyun		pulse-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
94*4882a593Smuzhiyun	};
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun	vcc1v2_dvdd: vcc1v8_dovdd: vcc2v8_avdd: vcc-camera {
97*4882a593Smuzhiyun		compatible = "regulator-fixed";
98*4882a593Smuzhiyun		regulator-name = "vcc_camera";
99*4882a593Smuzhiyun		regulator-boot-on;
100*4882a593Smuzhiyun		gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
101*4882a593Smuzhiyun		enable-active-high;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	vcc_1v8: vcc-1v8 {
105*4882a593Smuzhiyun		compatible = "regulator-fixed";
106*4882a593Smuzhiyun		regulator-name = "vcc_1v8";
107*4882a593Smuzhiyun		regulator-always-on;
108*4882a593Smuzhiyun		regulator-boot-on;
109*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
110*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
111*4882a593Smuzhiyun	};
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun	vccio_flash: vccio-flash {
114*4882a593Smuzhiyun		compatible = "regulator-fixed";
115*4882a593Smuzhiyun		regulator-name = "vccio_flash";
116*4882a593Smuzhiyun		regulator-always-on;
117*4882a593Smuzhiyun		regulator-boot-on;
118*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
119*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
120*4882a593Smuzhiyun		vin-supply = <&vcc_1v8>;
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun	vccio_sd: vccio-sd {
124*4882a593Smuzhiyun		compatible = "regulator-gpio";
125*4882a593Smuzhiyun		regulator-name = "vccio_sd";
126*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
127*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
128*4882a593Smuzhiyun		gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>;
129*4882a593Smuzhiyun		states = <3300000 1
130*4882a593Smuzhiyun			  1800000 0>;
131*4882a593Smuzhiyun	};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun	vdd_npu_vepu: vdd-npu-vepu {
134*4882a593Smuzhiyun		compatible = "pwm-regulator";
135*4882a593Smuzhiyun		pwms = <&pwm1 0 5000 1>;
136*4882a593Smuzhiyun		regulator-name = "vdd_npu_vepu";
137*4882a593Smuzhiyun		regulator-min-microvolt = <720000>;
138*4882a593Smuzhiyun		regulator-max-microvolt = <1000000>;
139*4882a593Smuzhiyun		regulator-init-microvolt = <824000>;
140*4882a593Smuzhiyun		regulator-always-on;
141*4882a593Smuzhiyun		regulator-boot-on;
142*4882a593Smuzhiyun		regulator-settling-time-up-us = <250>;
143*4882a593Smuzhiyun		pwm-supply = <&vcc_3v3>;
144*4882a593Smuzhiyun	};
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun	wireless-wlan {
147*4882a593Smuzhiyun		compatible = "wlan-platdata";
148*4882a593Smuzhiyun		rockchip,grf = <&grf>;
149*4882a593Smuzhiyun		pinctrl-names = "default";
150*4882a593Smuzhiyun		pinctrl-0 = <&wifi_wake_host>;
151*4882a593Smuzhiyun		wifi_chip_type = "ap6203";
152*4882a593Smuzhiyun		WIFI,poweren_gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
153*4882a593Smuzhiyun		WIFI,host_wake_irq = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
154*4882a593Smuzhiyun		status = "okay";
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun&csi_dphy0 {
159*4882a593Smuzhiyun	status = "okay";
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	ports {
162*4882a593Smuzhiyun		#address-cells = <1>;
163*4882a593Smuzhiyun		#size-cells = <0>;
164*4882a593Smuzhiyun		port@0 {
165*4882a593Smuzhiyun			reg = <0>;
166*4882a593Smuzhiyun			#address-cells = <1>;
167*4882a593Smuzhiyun			#size-cells = <0>;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun			mipi_in_ucam0: endpoint@1 {
170*4882a593Smuzhiyun				reg = <1>;
171*4882a593Smuzhiyun				remote-endpoint = <&ucam_out0>;
172*4882a593Smuzhiyun				data-lanes = <1 2>;
173*4882a593Smuzhiyun			};
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun		port@1 {
176*4882a593Smuzhiyun			reg = <1>;
177*4882a593Smuzhiyun			#address-cells = <1>;
178*4882a593Smuzhiyun			#size-cells = <0>;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun			csidphy0_out: endpoint@0 {
181*4882a593Smuzhiyun				reg = <0>;
182*4882a593Smuzhiyun				remote-endpoint = <&isp_in>;
183*4882a593Smuzhiyun			};
184*4882a593Smuzhiyun		};
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun};
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun&emmc {
189*4882a593Smuzhiyun	bus-width = <8>;
190*4882a593Smuzhiyun	cap-mmc-highspeed;
191*4882a593Smuzhiyun	non-removable;
192*4882a593Smuzhiyun	mmc-hs200-1_8v;
193*4882a593Smuzhiyun	rockchip,default-sample-phase = <90>;
194*4882a593Smuzhiyun	no-sdio;
195*4882a593Smuzhiyun	no-sd;
196*4882a593Smuzhiyun	/delete-property/ pinctrl-names;
197*4882a593Smuzhiyun	/delete-property/ pinctrl-0;
198*4882a593Smuzhiyun	status = "okay";
199*4882a593Smuzhiyun};
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun&i2c0 {
202*4882a593Smuzhiyun	status = "okay";
203*4882a593Smuzhiyun	clock-frequency = <100000>;
204*4882a593Smuzhiyun
205*4882a593Smuzhiyun	CW2015@62 {
206*4882a593Smuzhiyun		compatible = "cw201x";
207*4882a593Smuzhiyun		reg = <0x62>;
208*4882a593Smuzhiyun		bat_low_gpio = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
209*4882a593Smuzhiyun		bat_config_info = <0x15 0x7E 0x7A 0x6E 0x6A 0x67 0x63 0x62 0x62 0x61 0x5E
210*4882a593Smuzhiyun				   0x59 0x56 0x57 0x51 0x3C 0x30 0x27 0x29 0x29 0x2E 0x3A
211*4882a593Smuzhiyun				   0x49 0x57 0x64 0x57 0x0B 0x85 0x30 0x50 0x60 0x67 0x6A
212*4882a593Smuzhiyun				   0x6C 0x6A 0x6C 0x39 0x14 0x64 0x0E 0x04 0x2A 0x4E 0x81
213*4882a593Smuzhiyun				   0x8E 0x90 0x90 0x43 0x64 0x83 0x96 0xA5 0x80 0x86 0xAC
214*4882a593Smuzhiyun				   0xCB 0x2F 0x00 0x64 0xA5 0xB5 0x00 0xF8 0x31>;
215*4882a593Smuzhiyun		monitor_sec = <5>;
216*4882a593Smuzhiyun		virtual_power = <0>;
217*4882a593Smuzhiyun	};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun	pcf8563: pcf8563@51 {
220*4882a593Smuzhiyun		compatible = "pcf8563";
221*4882a593Smuzhiyun		reg = <0x51>;
222*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
223*4882a593Smuzhiyun		interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
224*4882a593Smuzhiyun		pinctrl-names = "default";
225*4882a593Smuzhiyun		pinctrl-0 = <&rtc_int>;
226*4882a593Smuzhiyun		#clock-cells = <0>;
227*4882a593Smuzhiyun		clock-frequency = <32768>;
228*4882a593Smuzhiyun		clock-output-names = "xin32k";
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun};
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun&i2c1 {
233*4882a593Smuzhiyun	status = "okay";
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun	sc210iot: sc210iot@32 {
236*4882a593Smuzhiyun		compatible = "smartsens,sc210iot";
237*4882a593Smuzhiyun		reg = <0x32>;
238*4882a593Smuzhiyun		clocks = <&cru CLK_MIPICSI_OUT>;
239*4882a593Smuzhiyun		clock-names = "xvclk";
240*4882a593Smuzhiyun		power-domains = <&power RV1126_PD_VI>;
241*4882a593Smuzhiyun		avdd-supply = <&vcc2v8_avdd>;
242*4882a593Smuzhiyun		dovdd-supply = <&vcc1v8_dovdd>;
243*4882a593Smuzhiyun		dvdd-supply = <&vcc1v2_dvdd>;
244*4882a593Smuzhiyun		pwdn-gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>;
245*4882a593Smuzhiyun		reset-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
246*4882a593Smuzhiyun		rockchip,camera-module-index = <1>;
247*4882a593Smuzhiyun		rockchip,camera-module-facing = "front";
248*4882a593Smuzhiyun		rockchip,camera-module-name = "YT-SC210-V2";
249*4882a593Smuzhiyun		rockchip,camera-module-lens-name = "M12-30IRC-2MP-F18";
250*4882a593Smuzhiyun		ir-cut = <&cam_ircut0>;
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun		port {
253*4882a593Smuzhiyun			ucam_out0: endpoint {
254*4882a593Smuzhiyun				remote-endpoint = <&mipi_in_ucam0>;
255*4882a593Smuzhiyun				data-lanes = <1 2>;
256*4882a593Smuzhiyun			};
257*4882a593Smuzhiyun		};
258*4882a593Smuzhiyun	};
259*4882a593Smuzhiyun};
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun&i2c4 {
262*4882a593Smuzhiyun	status = "okay";
263*4882a593Smuzhiyun	clock-frequency = <400000>;
264*4882a593Smuzhiyun	pinctrl-0 = <&i2c4m1_xfer>;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun	es8311: es8311@18 {
267*4882a593Smuzhiyun		compatible = "everest,es8311";
268*4882a593Smuzhiyun		reg = <0x18>;
269*4882a593Smuzhiyun		clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
270*4882a593Smuzhiyun		clock-names = "mclk";
271*4882a593Smuzhiyun		adc-pga-gain = <6>;  /* 18dB */
272*4882a593Smuzhiyun		adc-volume = <0xbf>;  /* 0dB */
273*4882a593Smuzhiyun		dac-volume = <0xbf>;  /* 0dB */
274*4882a593Smuzhiyun		aec-mode = "dac left, adc right";
275*4882a593Smuzhiyun		pinctrl-names = "default";
276*4882a593Smuzhiyun		pinctrl-0 = <&i2s0m0_mclk &spk_ctl>;
277*4882a593Smuzhiyun		assigned-clocks = <&cru MCLK_I2S0_TX_OUT2IO>;
278*4882a593Smuzhiyun		assigned-clock-parents = <&cru MCLK_I2S0_TX>;
279*4882a593Smuzhiyun		spk-ctl-gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_HIGH>;
280*4882a593Smuzhiyun		#sound-dai-cells = <0>;
281*4882a593Smuzhiyun	};
282*4882a593Smuzhiyun};
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun&i2s0_8ch {
285*4882a593Smuzhiyun	status = "okay";
286*4882a593Smuzhiyun	#sound-dai-cells = <0>;
287*4882a593Smuzhiyun	rockchip,clk-trcm = <1>;
288*4882a593Smuzhiyun	rockchip,i2s-rx-route = <3 0 1 2>;
289*4882a593Smuzhiyun	pinctrl-0 = <&i2s0m0_sclk_tx
290*4882a593Smuzhiyun		     &i2s0m0_lrck_tx
291*4882a593Smuzhiyun		     &i2s0m0_sdo0
292*4882a593Smuzhiyun		     &i2s0m0_sdo1_sdi3>;
293*4882a593Smuzhiyun};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun&isp_reserved {
296*4882a593Smuzhiyun	size = <0x02400000>;
297*4882a593Smuzhiyun};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun&npu {
300*4882a593Smuzhiyun	npu-supply = <&vdd_npu_vepu>;
301*4882a593Smuzhiyun};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun&pinctrl {
304*4882a593Smuzhiyun	charger {
305*4882a593Smuzhiyun		/omit-if-no-ref/
306*4882a593Smuzhiyun		charger_io: charger-io {
307*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>,
308*4882a593Smuzhiyun					<0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
309*4882a593Smuzhiyun		};
310*4882a593Smuzhiyun	};
311*4882a593Smuzhiyun	es8311 {
312*4882a593Smuzhiyun		spk_ctl: spk-ctl {
313*4882a593Smuzhiyun			rockchip,pins = <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
314*4882a593Smuzhiyun		};
315*4882a593Smuzhiyun	};
316*4882a593Smuzhiyun	ir-cut {
317*4882a593Smuzhiyun		/omit-if-no-ref/
318*4882a593Smuzhiyun		ir_cut_en: ir-cut-en {
319*4882a593Smuzhiyun			rockchip,pins = <2 RK_PD4 RK_FUNC_GPIO &pcfg_output_low>;
320*4882a593Smuzhiyun		};
321*4882a593Smuzhiyun	};
322*4882a593Smuzhiyun	regulator {
323*4882a593Smuzhiyun		/omit-if-no-ref/
324*4882a593Smuzhiyun		power_hold: power-hold {
325*4882a593Smuzhiyun			rockchip,pins =
326*4882a593Smuzhiyun				<0 RK_PA0 RK_FUNC_GPIO &pcfg_output_high>;
327*4882a593Smuzhiyun		};
328*4882a593Smuzhiyun	};
329*4882a593Smuzhiyun	rtc {
330*4882a593Smuzhiyun		/omit-if-no-ref/
331*4882a593Smuzhiyun		rtc_int: rtc-int {
332*4882a593Smuzhiyun			rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;
333*4882a593Smuzhiyun		};
334*4882a593Smuzhiyun	};
335*4882a593Smuzhiyun	wireless-wlan {
336*4882a593Smuzhiyun		/omit-if-no-ref/
337*4882a593Smuzhiyun		wifi_wake_host: wifi-wake-host {
338*4882a593Smuzhiyun			rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_down>;
339*4882a593Smuzhiyun		};
340*4882a593Smuzhiyun	};
341*4882a593Smuzhiyun};
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun&pmu_io_domains {
344*4882a593Smuzhiyun	status = "okay";
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun	pmuio0-supply = <&vcc_1v8>;
347*4882a593Smuzhiyun	pmuio1-supply = <&vcc_3v3>;
348*4882a593Smuzhiyun	vccio2-supply = <&vccio_sd>;
349*4882a593Smuzhiyun	vccio3-supply = <&vcc_1v8>;
350*4882a593Smuzhiyun	vccio4-supply = <&vcc_1v8>;
351*4882a593Smuzhiyun	vccio5-supply = <&vcc_3v3>;
352*4882a593Smuzhiyun	vccio7-supply = <&vcc_3v3>;
353*4882a593Smuzhiyun};
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun&pwm1 {
356*4882a593Smuzhiyun	status = "okay";
357*4882a593Smuzhiyun	pinctrl-names = "active";
358*4882a593Smuzhiyun	pinctrl-0 = <&pwm1m0_pins_pull_down>;
359*4882a593Smuzhiyun};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&pwm2 {
362*4882a593Smuzhiyun	status = "okay";
363*4882a593Smuzhiyun	pinctrl-names = "active";
364*4882a593Smuzhiyun	pinctrl-0 = <&pwm2m1_pins_pull_down>;
365*4882a593Smuzhiyun};
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun&pwm3 {
368*4882a593Smuzhiyun	status = "okay";
369*4882a593Smuzhiyun	pinctrl-names = "active";
370*4882a593Smuzhiyun	pinctrl-0 = <&pwm3m1_pins_pull_down>;
371*4882a593Smuzhiyun};
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun&rkisp_thunderboot {
374*4882a593Smuzhiyun	reg = <0x08000000 (32 * 0x00100000)>;
375*4882a593Smuzhiyun};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun&rkisp_vir0 {
378*4882a593Smuzhiyun	ports {
379*4882a593Smuzhiyun		port@0 {
380*4882a593Smuzhiyun			reg = <0>;
381*4882a593Smuzhiyun			#address-cells = <1>;
382*4882a593Smuzhiyun			#size-cells = <0>;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun			isp_in: endpoint@0 {
385*4882a593Smuzhiyun				reg = <0>;
386*4882a593Smuzhiyun				remote-endpoint = <&csidphy0_out>;
387*4882a593Smuzhiyun			};
388*4882a593Smuzhiyun		};
389*4882a593Smuzhiyun	};
390*4882a593Smuzhiyun};
391*4882a593Smuzhiyun
392*4882a593Smuzhiyun&rkvenc {
393*4882a593Smuzhiyun	venc-supply = <&vdd_npu_vepu>;
394*4882a593Smuzhiyun};
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun&rkvenc_mmu {
397*4882a593Smuzhiyun	status = "okay";
398*4882a593Smuzhiyun};
399*4882a593Smuzhiyun
400*4882a593Smuzhiyun&mpp_srv {
401*4882a593Smuzhiyun	status = "okay";
402*4882a593Smuzhiyun};
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun&rockchip_suspend {
405*4882a593Smuzhiyun	status = "okay";
406*4882a593Smuzhiyun	rockchip,sleep-debug-en = <1>;
407*4882a593Smuzhiyun	rockchip,sleep-mode-config = <
408*4882a593Smuzhiyun		(0
409*4882a593Smuzhiyun		| RKPM_SLP_ARMOFF
410*4882a593Smuzhiyun		| RKPM_SLP_PMU_PMUALIVE_32K
411*4882a593Smuzhiyun		| RKPM_SLP_PMU_DIS_OSC
412*4882a593Smuzhiyun		)
413*4882a593Smuzhiyun	>;
414*4882a593Smuzhiyun};
415*4882a593Smuzhiyun
416*4882a593Smuzhiyun&saradc {
417*4882a593Smuzhiyun	status = "okay";
418*4882a593Smuzhiyun	vref-supply = <&vcc_1v8>;
419*4882a593Smuzhiyun};
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun&sdio {
422*4882a593Smuzhiyun	max-frequency = <50000000>;
423*4882a593Smuzhiyun	bus-width = <4>;
424*4882a593Smuzhiyun	cap-sd-highspeed;
425*4882a593Smuzhiyun	cap-sdio-irq;
426*4882a593Smuzhiyun	keep-power-in-suspend;
427*4882a593Smuzhiyun	rockchip,default-sample-phase = <90>;
428*4882a593Smuzhiyun	no-sd;
429*4882a593Smuzhiyun	no-mmc;
430*4882a593Smuzhiyun	supports-chip-alive;
431*4882a593Smuzhiyun	logic-remove-card;
432*4882a593Smuzhiyun	status = "okay";
433*4882a593Smuzhiyun};
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun&sdmmc {
436*4882a593Smuzhiyun	bus-width = <4>;
437*4882a593Smuzhiyun	cap-mmc-highspeed;
438*4882a593Smuzhiyun	cap-sd-highspeed;
439*4882a593Smuzhiyun	card-detect-delay = <200>;
440*4882a593Smuzhiyun	rockchip,default-sample-phase = <90>;
441*4882a593Smuzhiyun	no-sdio;
442*4882a593Smuzhiyun	no-mmc;
443*4882a593Smuzhiyun	sd-uhs-sdr12;
444*4882a593Smuzhiyun	sd-uhs-sdr25;
445*4882a593Smuzhiyun	sd-uhs-sdr104;
446*4882a593Smuzhiyun	vqmmc-supply = <&vccio_sd>;
447*4882a593Smuzhiyun	status = "okay";
448*4882a593Smuzhiyun};
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun&u2phy0 {
451*4882a593Smuzhiyun	vup-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_LOW>;
452*4882a593Smuzhiyun};
453