xref: /OK3568_Linux_fs/kernel/drivers/power/supply/bq27xxx_battery.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * BQ27xxx battery driver
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2008 Rodolfo Giometti <giometti@linux.it>
6*4882a593Smuzhiyun  * Copyright (C) 2008 Eurotech S.p.A. <info@eurotech.it>
7*4882a593Smuzhiyun  * Copyright (C) 2010-2011 Lars-Peter Clausen <lars@metafoo.de>
8*4882a593Smuzhiyun  * Copyright (C) 2011 Pali Rohár <pali@kernel.org>
9*4882a593Smuzhiyun  * Copyright (C) 2017 Liam Breck <kernel@networkimprov.net>
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * Based on a previous work by Copyright (C) 2008 Texas Instruments, Inc.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * Datasheets:
14*4882a593Smuzhiyun  * https://www.ti.com/product/bq27000
15*4882a593Smuzhiyun  * https://www.ti.com/product/bq27200
16*4882a593Smuzhiyun  * https://www.ti.com/product/bq27010
17*4882a593Smuzhiyun  * https://www.ti.com/product/bq27210
18*4882a593Smuzhiyun  * https://www.ti.com/product/bq27500
19*4882a593Smuzhiyun  * https://www.ti.com/product/bq27510-g1
20*4882a593Smuzhiyun  * https://www.ti.com/product/bq27510-g2
21*4882a593Smuzhiyun  * https://www.ti.com/product/bq27510-g3
22*4882a593Smuzhiyun  * https://www.ti.com/product/bq27520-g1
23*4882a593Smuzhiyun  * https://www.ti.com/product/bq27520-g2
24*4882a593Smuzhiyun  * https://www.ti.com/product/bq27520-g3
25*4882a593Smuzhiyun  * https://www.ti.com/product/bq27520-g4
26*4882a593Smuzhiyun  * https://www.ti.com/product/bq27530-g1
27*4882a593Smuzhiyun  * https://www.ti.com/product/bq27531-g1
28*4882a593Smuzhiyun  * https://www.ti.com/product/bq27541-g1
29*4882a593Smuzhiyun  * https://www.ti.com/product/bq27542-g1
30*4882a593Smuzhiyun  * https://www.ti.com/product/bq27546-g1
31*4882a593Smuzhiyun  * https://www.ti.com/product/bq27742-g1
32*4882a593Smuzhiyun  * https://www.ti.com/product/bq27545-g1
33*4882a593Smuzhiyun  * https://www.ti.com/product/bq27421-g1
34*4882a593Smuzhiyun  * https://www.ti.com/product/bq27425-g1
35*4882a593Smuzhiyun  * https://www.ti.com/product/bq27426
36*4882a593Smuzhiyun  * https://www.ti.com/product/bq27411-g1
37*4882a593Smuzhiyun  * https://www.ti.com/product/bq27441-g1
38*4882a593Smuzhiyun  * https://www.ti.com/product/bq27621-g1
39*4882a593Smuzhiyun  * https://www.ti.com/product/bq27z561
40*4882a593Smuzhiyun  * https://www.ti.com/product/bq28z610
41*4882a593Smuzhiyun  * https://www.ti.com/product/bq34z100-g1
42*4882a593Smuzhiyun  */
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #include <linux/device.h>
45*4882a593Smuzhiyun #include <linux/module.h>
46*4882a593Smuzhiyun #include <linux/mutex.h>
47*4882a593Smuzhiyun #include <linux/param.h>
48*4882a593Smuzhiyun #include <linux/jiffies.h>
49*4882a593Smuzhiyun #include <linux/workqueue.h>
50*4882a593Smuzhiyun #include <linux/delay.h>
51*4882a593Smuzhiyun #include <linux/platform_device.h>
52*4882a593Smuzhiyun #include <linux/power_supply.h>
53*4882a593Smuzhiyun #include <linux/slab.h>
54*4882a593Smuzhiyun #include <linux/of.h>
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun #include <linux/power/bq27xxx_battery.h>
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun #define BQ27XXX_MANUFACTURER	"Texas Instruments"
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /* BQ27XXX Flags */
61*4882a593Smuzhiyun #define BQ27XXX_FLAG_DSC	BIT(0)
62*4882a593Smuzhiyun #define BQ27XXX_FLAG_SOCF	BIT(1) /* State-of-Charge threshold final */
63*4882a593Smuzhiyun #define BQ27XXX_FLAG_SOC1	BIT(2) /* State-of-Charge threshold 1 */
64*4882a593Smuzhiyun #define BQ27XXX_FLAG_CFGUP	BIT(4)
65*4882a593Smuzhiyun #define BQ27XXX_FLAG_FC		BIT(9)
66*4882a593Smuzhiyun #define BQ27XXX_FLAG_OTD	BIT(14)
67*4882a593Smuzhiyun #define BQ27XXX_FLAG_OTC	BIT(15)
68*4882a593Smuzhiyun #define BQ27XXX_FLAG_UT		BIT(14)
69*4882a593Smuzhiyun #define BQ27XXX_FLAG_OT		BIT(15)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* BQ27000 has different layout for Flags register */
72*4882a593Smuzhiyun #define BQ27000_FLAG_EDVF	BIT(0) /* Final End-of-Discharge-Voltage flag */
73*4882a593Smuzhiyun #define BQ27000_FLAG_EDV1	BIT(1) /* First End-of-Discharge-Voltage flag */
74*4882a593Smuzhiyun #define BQ27000_FLAG_CI		BIT(4) /* Capacity Inaccurate flag */
75*4882a593Smuzhiyun #define BQ27000_FLAG_FC		BIT(5)
76*4882a593Smuzhiyun #define BQ27000_FLAG_CHGS	BIT(7) /* Charge state flag */
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /* BQ27Z561 has different layout for Flags register */
79*4882a593Smuzhiyun #define BQ27Z561_FLAG_FDC	BIT(4) /* Battery fully discharged */
80*4882a593Smuzhiyun #define BQ27Z561_FLAG_FC	BIT(5) /* Battery fully charged */
81*4882a593Smuzhiyun #define BQ27Z561_FLAG_DIS_CH	BIT(6) /* Battery is discharging */
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun /* control register params */
84*4882a593Smuzhiyun #define BQ27XXX_SEALED			0x20
85*4882a593Smuzhiyun #define BQ27XXX_SET_CFGUPDATE		0x13
86*4882a593Smuzhiyun #define BQ27XXX_SOFT_RESET		0x42
87*4882a593Smuzhiyun #define BQ27XXX_RESET			0x41
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define BQ27XXX_RS			(20) /* Resistor sense mOhm */
90*4882a593Smuzhiyun #define BQ27XXX_POWER_CONSTANT		(29200) /* 29.2 µV^2 * 1000 */
91*4882a593Smuzhiyun #define BQ27XXX_CURRENT_CONSTANT	(3570) /* 3.57 µV * 1000 */
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun #define INVALID_REG_ADDR	0xff
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun  * bq27xxx_reg_index - Register names
97*4882a593Smuzhiyun  *
98*4882a593Smuzhiyun  * These are indexes into a device's register mapping array.
99*4882a593Smuzhiyun  */
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun enum bq27xxx_reg_index {
102*4882a593Smuzhiyun 	BQ27XXX_REG_CTRL = 0,	/* Control */
103*4882a593Smuzhiyun 	BQ27XXX_REG_TEMP,	/* Temperature */
104*4882a593Smuzhiyun 	BQ27XXX_REG_INT_TEMP,	/* Internal Temperature */
105*4882a593Smuzhiyun 	BQ27XXX_REG_VOLT,	/* Voltage */
106*4882a593Smuzhiyun 	BQ27XXX_REG_AI,		/* Average Current */
107*4882a593Smuzhiyun 	BQ27XXX_REG_FLAGS,	/* Flags */
108*4882a593Smuzhiyun 	BQ27XXX_REG_TTE,	/* Time-to-Empty */
109*4882a593Smuzhiyun 	BQ27XXX_REG_TTF,	/* Time-to-Full */
110*4882a593Smuzhiyun 	BQ27XXX_REG_TTES,	/* Time-to-Empty Standby */
111*4882a593Smuzhiyun 	BQ27XXX_REG_TTECP,	/* Time-to-Empty at Constant Power */
112*4882a593Smuzhiyun 	BQ27XXX_REG_NAC,	/* Nominal Available Capacity */
113*4882a593Smuzhiyun 	BQ27XXX_REG_FCC,	/* Full Charge Capacity */
114*4882a593Smuzhiyun 	BQ27XXX_REG_CYCT,	/* Cycle Count */
115*4882a593Smuzhiyun 	BQ27XXX_REG_AE,		/* Available Energy */
116*4882a593Smuzhiyun 	BQ27XXX_REG_SOC,	/* State-of-Charge */
117*4882a593Smuzhiyun 	BQ27XXX_REG_DCAP,	/* Design Capacity */
118*4882a593Smuzhiyun 	BQ27XXX_REG_AP,		/* Average Power */
119*4882a593Smuzhiyun 	BQ27XXX_DM_CTRL,	/* Block Data Control */
120*4882a593Smuzhiyun 	BQ27XXX_DM_CLASS,	/* Data Class */
121*4882a593Smuzhiyun 	BQ27XXX_DM_BLOCK,	/* Data Block */
122*4882a593Smuzhiyun 	BQ27XXX_DM_DATA,	/* Block Data */
123*4882a593Smuzhiyun 	BQ27XXX_DM_CKSUM,	/* Block Data Checksum */
124*4882a593Smuzhiyun 	BQ27XXX_REG_MAX,	/* sentinel */
125*4882a593Smuzhiyun };
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun #define BQ27XXX_DM_REG_ROWS \
128*4882a593Smuzhiyun 	[BQ27XXX_DM_CTRL] = 0x61,  \
129*4882a593Smuzhiyun 	[BQ27XXX_DM_CLASS] = 0x3e, \
130*4882a593Smuzhiyun 	[BQ27XXX_DM_BLOCK] = 0x3f, \
131*4882a593Smuzhiyun 	[BQ27XXX_DM_DATA] = 0x40,  \
132*4882a593Smuzhiyun 	[BQ27XXX_DM_CKSUM] = 0x60
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun /* Register mappings */
135*4882a593Smuzhiyun static u8
136*4882a593Smuzhiyun 	bq27000_regs[BQ27XXX_REG_MAX] = {
137*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
138*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
139*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
140*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
141*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
142*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
143*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
144*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x18,
145*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1c,
146*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = 0x26,
147*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
148*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
149*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
150*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x22,
151*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x0b,
152*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x76,
153*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
154*4882a593Smuzhiyun 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
155*4882a593Smuzhiyun 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
156*4882a593Smuzhiyun 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
157*4882a593Smuzhiyun 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
158*4882a593Smuzhiyun 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
159*4882a593Smuzhiyun 	},
160*4882a593Smuzhiyun 	bq27010_regs[BQ27XXX_REG_MAX] = {
161*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
162*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
163*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
164*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
165*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
166*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
167*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
168*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x18,
169*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1c,
170*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = 0x26,
171*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
172*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
173*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
174*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
175*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x0b,
176*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x76,
177*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
178*4882a593Smuzhiyun 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
179*4882a593Smuzhiyun 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
180*4882a593Smuzhiyun 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
181*4882a593Smuzhiyun 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
182*4882a593Smuzhiyun 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
183*4882a593Smuzhiyun 	},
184*4882a593Smuzhiyun 	bq2750x_regs[BQ27XXX_REG_MAX] = {
185*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
186*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
187*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x28,
188*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
189*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
190*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
191*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
192*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
193*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1a,
194*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
195*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
196*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
197*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
198*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
199*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
200*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
201*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
202*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
203*4882a593Smuzhiyun 	},
204*4882a593Smuzhiyun #define bq2751x_regs bq27510g3_regs
205*4882a593Smuzhiyun #define bq2752x_regs bq27510g3_regs
206*4882a593Smuzhiyun 	bq27500_regs[BQ27XXX_REG_MAX] = {
207*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
208*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
209*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
210*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
211*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
212*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
213*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
214*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x18,
215*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1c,
216*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = 0x26,
217*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
218*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
219*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
220*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x22,
221*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
222*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
223*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
224*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
225*4882a593Smuzhiyun 	},
226*4882a593Smuzhiyun #define bq27510g1_regs bq27500_regs
227*4882a593Smuzhiyun #define bq27510g2_regs bq27500_regs
228*4882a593Smuzhiyun 	bq27510g3_regs[BQ27XXX_REG_MAX] = {
229*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
230*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
231*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x28,
232*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
233*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
234*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
235*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
236*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
237*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1a,
238*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
239*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
240*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
241*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x1e,
242*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
243*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x20,
244*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x2e,
245*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
246*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
247*4882a593Smuzhiyun 	},
248*4882a593Smuzhiyun 	bq27520g1_regs[BQ27XXX_REG_MAX] = {
249*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
250*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
251*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
252*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
253*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
254*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
255*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
256*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x18,
257*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1c,
258*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = 0x26,
259*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
260*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
261*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
262*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x22,
263*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
264*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
265*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
266*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
267*4882a593Smuzhiyun 	},
268*4882a593Smuzhiyun 	bq27520g2_regs[BQ27XXX_REG_MAX] = {
269*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
270*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
271*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x36,
272*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
273*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
274*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
275*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
276*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x18,
277*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1c,
278*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = 0x26,
279*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
280*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
281*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
282*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x22,
283*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
284*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
285*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
286*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
287*4882a593Smuzhiyun 	},
288*4882a593Smuzhiyun 	bq27520g3_regs[BQ27XXX_REG_MAX] = {
289*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
290*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
291*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x36,
292*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
293*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
294*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
295*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
296*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
297*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1c,
298*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = 0x26,
299*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
300*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
301*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
302*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x22,
303*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
304*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
305*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
306*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
307*4882a593Smuzhiyun 	},
308*4882a593Smuzhiyun 	bq27520g4_regs[BQ27XXX_REG_MAX] = {
309*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
310*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
311*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x28,
312*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
313*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
314*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
315*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
316*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
317*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1c,
318*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
319*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
320*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
321*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x1e,
322*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
323*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x20,
324*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
325*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
326*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
327*4882a593Smuzhiyun 	},
328*4882a593Smuzhiyun 	bq27521_regs[BQ27XXX_REG_MAX] = {
329*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x02,
330*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x0a,
331*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
332*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x0c,
333*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x0e,
334*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x08,
335*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
336*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
337*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
338*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
339*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
340*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = INVALID_REG_ADDR,
341*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
342*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
343*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = INVALID_REG_ADDR,
344*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
345*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = INVALID_REG_ADDR,
346*4882a593Smuzhiyun 		[BQ27XXX_DM_CTRL] = INVALID_REG_ADDR,
347*4882a593Smuzhiyun 		[BQ27XXX_DM_CLASS] = INVALID_REG_ADDR,
348*4882a593Smuzhiyun 		[BQ27XXX_DM_BLOCK] = INVALID_REG_ADDR,
349*4882a593Smuzhiyun 		[BQ27XXX_DM_DATA] = INVALID_REG_ADDR,
350*4882a593Smuzhiyun 		[BQ27XXX_DM_CKSUM] = INVALID_REG_ADDR,
351*4882a593Smuzhiyun 	},
352*4882a593Smuzhiyun 	bq27530_regs[BQ27XXX_REG_MAX] = {
353*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
354*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
355*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x32,
356*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
357*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
358*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
359*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
360*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
361*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
362*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
363*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
364*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
365*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
366*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
367*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
368*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
369*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
370*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
371*4882a593Smuzhiyun 	},
372*4882a593Smuzhiyun #define bq27531_regs bq27530_regs
373*4882a593Smuzhiyun 	bq27541_regs[BQ27XXX_REG_MAX] = {
374*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
375*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
376*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x28,
377*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
378*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
379*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
380*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
381*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
382*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
383*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
384*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
385*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
386*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
387*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
388*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
389*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
390*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
391*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
392*4882a593Smuzhiyun 	},
393*4882a593Smuzhiyun #define bq27542_regs bq27541_regs
394*4882a593Smuzhiyun #define bq27546_regs bq27541_regs
395*4882a593Smuzhiyun #define bq27742_regs bq27541_regs
396*4882a593Smuzhiyun 	bq27545_regs[BQ27XXX_REG_MAX] = {
397*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
398*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
399*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x28,
400*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
401*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
402*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
403*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
404*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
405*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
406*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
407*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x0c,
408*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
409*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
410*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
411*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
412*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = INVALID_REG_ADDR,
413*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x24,
414*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
415*4882a593Smuzhiyun 	},
416*4882a593Smuzhiyun 	bq27421_regs[BQ27XXX_REG_MAX] = {
417*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
418*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x02,
419*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x1e,
420*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x04,
421*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x10,
422*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x06,
423*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = INVALID_REG_ADDR,
424*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = INVALID_REG_ADDR,
425*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
426*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
427*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = 0x08,
428*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x0e,
429*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = INVALID_REG_ADDR,
430*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = INVALID_REG_ADDR,
431*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x1c,
432*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
433*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x18,
434*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
435*4882a593Smuzhiyun 	},
436*4882a593Smuzhiyun #define bq27411_regs bq27421_regs
437*4882a593Smuzhiyun #define bq27425_regs bq27421_regs
438*4882a593Smuzhiyun #define bq27426_regs bq27421_regs
439*4882a593Smuzhiyun #define bq27441_regs bq27421_regs
440*4882a593Smuzhiyun #define bq27621_regs bq27421_regs
441*4882a593Smuzhiyun 	bq27z561_regs[BQ27XXX_REG_MAX] = {
442*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
443*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
444*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
445*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
446*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
447*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
448*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
449*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x18,
450*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
451*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
452*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
453*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
454*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
455*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x22,
456*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
457*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
458*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x22,
459*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
460*4882a593Smuzhiyun 	},
461*4882a593Smuzhiyun 	bq28z610_regs[BQ27XXX_REG_MAX] = {
462*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
463*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x06,
464*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = INVALID_REG_ADDR,
465*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
466*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x14,
467*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0a,
468*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x16,
469*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x18,
470*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = INVALID_REG_ADDR,
471*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
472*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
473*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x12,
474*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2a,
475*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x22,
476*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x2c,
477*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
478*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x22,
479*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
480*4882a593Smuzhiyun 	},
481*4882a593Smuzhiyun 	bq34z100_regs[BQ27XXX_REG_MAX] = {
482*4882a593Smuzhiyun 		[BQ27XXX_REG_CTRL] = 0x00,
483*4882a593Smuzhiyun 		[BQ27XXX_REG_TEMP] = 0x0c,
484*4882a593Smuzhiyun 		[BQ27XXX_REG_INT_TEMP] = 0x2a,
485*4882a593Smuzhiyun 		[BQ27XXX_REG_VOLT] = 0x08,
486*4882a593Smuzhiyun 		[BQ27XXX_REG_AI] = 0x0a,
487*4882a593Smuzhiyun 		[BQ27XXX_REG_FLAGS] = 0x0e,
488*4882a593Smuzhiyun 		[BQ27XXX_REG_TTE] = 0x18,
489*4882a593Smuzhiyun 		[BQ27XXX_REG_TTF] = 0x1a,
490*4882a593Smuzhiyun 		[BQ27XXX_REG_TTES] = 0x1e,
491*4882a593Smuzhiyun 		[BQ27XXX_REG_TTECP] = INVALID_REG_ADDR,
492*4882a593Smuzhiyun 		[BQ27XXX_REG_NAC] = INVALID_REG_ADDR,
493*4882a593Smuzhiyun 		[BQ27XXX_REG_FCC] = 0x06,
494*4882a593Smuzhiyun 		[BQ27XXX_REG_CYCT] = 0x2c,
495*4882a593Smuzhiyun 		[BQ27XXX_REG_AE] = 0x24,
496*4882a593Smuzhiyun 		[BQ27XXX_REG_SOC] = 0x02,
497*4882a593Smuzhiyun 		[BQ27XXX_REG_DCAP] = 0x3c,
498*4882a593Smuzhiyun 		[BQ27XXX_REG_AP] = 0x22,
499*4882a593Smuzhiyun 		BQ27XXX_DM_REG_ROWS,
500*4882a593Smuzhiyun 	};
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun static enum power_supply_property bq27000_props[] = {
503*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
504*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
505*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
506*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
507*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
508*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
509*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
510*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
511*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
512*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
513*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
514*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
515*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
516*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
517*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
518*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_ENERGY_NOW,
519*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
520*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
521*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
522*4882a593Smuzhiyun };
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun static enum power_supply_property bq27010_props[] = {
525*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
526*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
527*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
528*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
529*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
530*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
531*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
532*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
533*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
534*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
535*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
536*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
537*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
538*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
539*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
540*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
541*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
542*4882a593Smuzhiyun };
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun #define bq2750x_props bq27510g3_props
545*4882a593Smuzhiyun #define bq2751x_props bq27510g3_props
546*4882a593Smuzhiyun #define bq2752x_props bq27510g3_props
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun static enum power_supply_property bq27500_props[] = {
549*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
550*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
551*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
552*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
553*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
554*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
555*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
556*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
557*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
558*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
559*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
560*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
561*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
562*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
563*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_ENERGY_NOW,
564*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
565*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
566*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
567*4882a593Smuzhiyun };
568*4882a593Smuzhiyun #define bq27510g1_props bq27500_props
569*4882a593Smuzhiyun #define bq27510g2_props bq27500_props
570*4882a593Smuzhiyun 
571*4882a593Smuzhiyun static enum power_supply_property bq27510g3_props[] = {
572*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
573*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
574*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
575*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
576*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
577*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
578*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
579*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
580*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
581*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
582*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
583*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
584*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
585*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
586*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
587*4882a593Smuzhiyun };
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun static enum power_supply_property bq27520g1_props[] = {
590*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
591*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
592*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
593*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
594*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
595*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
596*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
597*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
598*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
599*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
600*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
601*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
602*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
603*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_ENERGY_NOW,
604*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
605*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
606*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
607*4882a593Smuzhiyun };
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun #define bq27520g2_props bq27500_props
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun static enum power_supply_property bq27520g3_props[] = {
612*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
613*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
614*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
615*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
616*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
617*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
618*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
619*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
620*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
621*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
622*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
623*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
624*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
625*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_ENERGY_NOW,
626*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
627*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
628*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
629*4882a593Smuzhiyun };
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun static enum power_supply_property bq27520g4_props[] = {
632*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
633*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
634*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
635*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
636*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
637*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
638*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
639*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
640*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
641*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
642*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
643*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
644*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
645*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
646*4882a593Smuzhiyun };
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun static enum power_supply_property bq27521_props[] = {
649*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
650*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
651*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
652*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
653*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
654*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
655*4882a593Smuzhiyun };
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun static enum power_supply_property bq27530_props[] = {
658*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
659*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
660*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
661*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
662*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
663*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
664*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
665*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
666*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
667*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
668*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
669*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
670*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
671*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
672*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
673*4882a593Smuzhiyun };
674*4882a593Smuzhiyun #define bq27531_props bq27530_props
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun static enum power_supply_property bq27541_props[] = {
677*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
678*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
679*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
680*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
681*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
682*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
683*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
684*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
685*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
686*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
687*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
688*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
689*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
690*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
691*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
692*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
693*4882a593Smuzhiyun };
694*4882a593Smuzhiyun #define bq27542_props bq27541_props
695*4882a593Smuzhiyun #define bq27546_props bq27541_props
696*4882a593Smuzhiyun #define bq27742_props bq27541_props
697*4882a593Smuzhiyun 
698*4882a593Smuzhiyun static enum power_supply_property bq27545_props[] = {
699*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
700*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
701*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
702*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
703*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
704*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
705*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
706*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
707*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
708*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
709*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
710*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
711*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
712*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
713*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
714*4882a593Smuzhiyun };
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun static enum power_supply_property bq27421_props[] = {
717*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
718*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
719*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
720*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
721*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
722*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
723*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
724*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
725*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
726*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_NOW,
727*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
728*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
729*4882a593Smuzhiyun };
730*4882a593Smuzhiyun #define bq27411_props bq27421_props
731*4882a593Smuzhiyun #define bq27425_props bq27421_props
732*4882a593Smuzhiyun #define bq27426_props bq27421_props
733*4882a593Smuzhiyun #define bq27441_props bq27421_props
734*4882a593Smuzhiyun #define bq27621_props bq27421_props
735*4882a593Smuzhiyun 
736*4882a593Smuzhiyun static enum power_supply_property bq27z561_props[] = {
737*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
738*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
739*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
740*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
741*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
742*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
743*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
744*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
745*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
746*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
747*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
748*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
749*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
750*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
751*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
752*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
753*4882a593Smuzhiyun };
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun static enum power_supply_property bq28z610_props[] = {
756*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
757*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
758*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
759*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
760*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
761*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
762*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
763*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
764*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
765*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
766*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
767*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
768*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
769*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
770*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
771*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
772*4882a593Smuzhiyun };
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun static enum power_supply_property bq34z100_props[] = {
775*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_STATUS,
776*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_PRESENT,
777*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_VOLTAGE_NOW,
778*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CURRENT_NOW,
779*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY,
780*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CAPACITY_LEVEL,
781*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TEMP,
782*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW,
783*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG,
784*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TIME_TO_FULL_NOW,
785*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_TECHNOLOGY,
786*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL,
787*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN,
788*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_CYCLE_COUNT,
789*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_ENERGY_NOW,
790*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_POWER_AVG,
791*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_HEALTH,
792*4882a593Smuzhiyun 	POWER_SUPPLY_PROP_MANUFACTURER,
793*4882a593Smuzhiyun };
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun struct bq27xxx_dm_reg {
796*4882a593Smuzhiyun 	u8 subclass_id;
797*4882a593Smuzhiyun 	u8 offset;
798*4882a593Smuzhiyun 	u8 bytes;
799*4882a593Smuzhiyun 	u16 min, max;
800*4882a593Smuzhiyun };
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun enum bq27xxx_dm_reg_id {
803*4882a593Smuzhiyun 	BQ27XXX_DM_DESIGN_CAPACITY = 0,
804*4882a593Smuzhiyun 	BQ27XXX_DM_DESIGN_ENERGY,
805*4882a593Smuzhiyun 	BQ27XXX_DM_TERMINATE_VOLTAGE,
806*4882a593Smuzhiyun };
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun #define bq27000_dm_regs 0
809*4882a593Smuzhiyun #define bq27010_dm_regs 0
810*4882a593Smuzhiyun #define bq2750x_dm_regs 0
811*4882a593Smuzhiyun #define bq2751x_dm_regs 0
812*4882a593Smuzhiyun #define bq2752x_dm_regs 0
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun #if 0 /* not yet tested */
815*4882a593Smuzhiyun static struct bq27xxx_dm_reg bq27500_dm_regs[] = {
816*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 48, 10, 2,    0, 65535 },
817*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY]     = { }, /* missing on chip */
818*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 48, 2, 1000, 32767 },
819*4882a593Smuzhiyun };
820*4882a593Smuzhiyun #else
821*4882a593Smuzhiyun #define bq27500_dm_regs 0
822*4882a593Smuzhiyun #endif
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun /* todo create data memory definitions from datasheets and test on chips */
825*4882a593Smuzhiyun #define bq27510g1_dm_regs 0
826*4882a593Smuzhiyun #define bq27510g2_dm_regs 0
827*4882a593Smuzhiyun #define bq27510g3_dm_regs 0
828*4882a593Smuzhiyun #define bq27520g1_dm_regs 0
829*4882a593Smuzhiyun #define bq27520g2_dm_regs 0
830*4882a593Smuzhiyun #define bq27520g3_dm_regs 0
831*4882a593Smuzhiyun #define bq27520g4_dm_regs 0
832*4882a593Smuzhiyun #define bq27521_dm_regs 0
833*4882a593Smuzhiyun #define bq27530_dm_regs 0
834*4882a593Smuzhiyun #define bq27531_dm_regs 0
835*4882a593Smuzhiyun #define bq27541_dm_regs 0
836*4882a593Smuzhiyun #define bq27542_dm_regs 0
837*4882a593Smuzhiyun #define bq27546_dm_regs 0
838*4882a593Smuzhiyun #define bq27742_dm_regs 0
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun #if 0 /* not yet tested */
841*4882a593Smuzhiyun static struct bq27xxx_dm_reg bq27545_dm_regs[] = {
842*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 48, 23, 2,    0, 32767 },
843*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 48, 25, 2,    0, 32767 },
844*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 80, 67, 2, 2800,  3700 },
845*4882a593Smuzhiyun };
846*4882a593Smuzhiyun #else
847*4882a593Smuzhiyun #define bq27545_dm_regs 0
848*4882a593Smuzhiyun #endif
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun static struct bq27xxx_dm_reg bq27411_dm_regs[] = {
851*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 10, 2,    0, 32767 },
852*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 12, 2,    0, 32767 },
853*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2800,  3700 },
854*4882a593Smuzhiyun };
855*4882a593Smuzhiyun 
856*4882a593Smuzhiyun static struct bq27xxx_dm_reg bq27421_dm_regs[] = {
857*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 10, 2,    0,  8000 },
858*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 12, 2,    0, 32767 },
859*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 16, 2, 2500,  3700 },
860*4882a593Smuzhiyun };
861*4882a593Smuzhiyun 
862*4882a593Smuzhiyun static struct bq27xxx_dm_reg bq27425_dm_regs[] = {
863*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 12, 2,    0, 32767 },
864*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 14, 2,    0, 32767 },
865*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 18, 2, 2800,  3700 },
866*4882a593Smuzhiyun };
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun static struct bq27xxx_dm_reg bq27426_dm_regs[] = {
869*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82,  6, 2,    0,  8000 },
870*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82,  8, 2,    0, 32767 },
871*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 10, 2, 2500,  3700 },
872*4882a593Smuzhiyun };
873*4882a593Smuzhiyun 
874*4882a593Smuzhiyun #if 0 /* not yet tested */
875*4882a593Smuzhiyun #define bq27441_dm_regs bq27421_dm_regs
876*4882a593Smuzhiyun #else
877*4882a593Smuzhiyun #define bq27441_dm_regs 0
878*4882a593Smuzhiyun #endif
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun #if 0 /* not yet tested */
881*4882a593Smuzhiyun static struct bq27xxx_dm_reg bq27621_dm_regs[] = {
882*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY]   = { 82, 3, 2,    0,  8000 },
883*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY]     = { 82, 5, 2,    0, 32767 },
884*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = { 82, 9, 2, 2500,  3700 },
885*4882a593Smuzhiyun };
886*4882a593Smuzhiyun #else
887*4882a593Smuzhiyun #define bq27621_dm_regs 0
888*4882a593Smuzhiyun #endif
889*4882a593Smuzhiyun 
890*4882a593Smuzhiyun #define bq27z561_dm_regs 0
891*4882a593Smuzhiyun #define bq28z610_dm_regs 0
892*4882a593Smuzhiyun #define bq34z100_dm_regs 0
893*4882a593Smuzhiyun 
894*4882a593Smuzhiyun #define BQ27XXX_O_ZERO		BIT(0)
895*4882a593Smuzhiyun #define BQ27XXX_O_OTDC		BIT(1) /* has OTC/OTD overtemperature flags */
896*4882a593Smuzhiyun #define BQ27XXX_O_UTOT		BIT(2) /* has OT overtemperature flag */
897*4882a593Smuzhiyun #define BQ27XXX_O_CFGUP		BIT(3)
898*4882a593Smuzhiyun #define BQ27XXX_O_RAM		BIT(4)
899*4882a593Smuzhiyun #define BQ27Z561_O_BITS		BIT(5)
900*4882a593Smuzhiyun #define BQ27XXX_O_SOC_SI	BIT(6) /* SoC is single register */
901*4882a593Smuzhiyun #define BQ27XXX_O_HAS_CI	BIT(7) /* has Capacity Inaccurate flag */
902*4882a593Smuzhiyun #define BQ27XXX_O_MUL_CHEM	BIT(8) /* multiple chemistries supported */
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun #define BQ27XXX_DATA(ref, key, opt) {		\
905*4882a593Smuzhiyun 	.opts = (opt),				\
906*4882a593Smuzhiyun 	.unseal_key = key,			\
907*4882a593Smuzhiyun 	.regs  = ref##_regs,			\
908*4882a593Smuzhiyun 	.dm_regs = ref##_dm_regs,		\
909*4882a593Smuzhiyun 	.props = ref##_props,			\
910*4882a593Smuzhiyun 	.props_size = ARRAY_SIZE(ref##_props) }
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun static struct {
913*4882a593Smuzhiyun 	u32 opts;
914*4882a593Smuzhiyun 	u32 unseal_key;
915*4882a593Smuzhiyun 	u8 *regs;
916*4882a593Smuzhiyun 	struct bq27xxx_dm_reg *dm_regs;
917*4882a593Smuzhiyun 	enum power_supply_property *props;
918*4882a593Smuzhiyun 	size_t props_size;
919*4882a593Smuzhiyun } bq27xxx_chip_data[] = {
920*4882a593Smuzhiyun 	[BQ27000]   = BQ27XXX_DATA(bq27000,   0         , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
921*4882a593Smuzhiyun 	[BQ27010]   = BQ27XXX_DATA(bq27010,   0         , BQ27XXX_O_ZERO | BQ27XXX_O_SOC_SI | BQ27XXX_O_HAS_CI),
922*4882a593Smuzhiyun 	[BQ2750X]   = BQ27XXX_DATA(bq2750x,   0         , BQ27XXX_O_OTDC),
923*4882a593Smuzhiyun 	[BQ2751X]   = BQ27XXX_DATA(bq2751x,   0         , BQ27XXX_O_OTDC),
924*4882a593Smuzhiyun 	[BQ2752X]   = BQ27XXX_DATA(bq2752x,   0         , BQ27XXX_O_OTDC),
925*4882a593Smuzhiyun 	[BQ27500]   = BQ27XXX_DATA(bq27500,   0x04143672, BQ27XXX_O_OTDC),
926*4882a593Smuzhiyun 	[BQ27510G1] = BQ27XXX_DATA(bq27510g1, 0         , BQ27XXX_O_OTDC),
927*4882a593Smuzhiyun 	[BQ27510G2] = BQ27XXX_DATA(bq27510g2, 0         , BQ27XXX_O_OTDC),
928*4882a593Smuzhiyun 	[BQ27510G3] = BQ27XXX_DATA(bq27510g3, 0         , BQ27XXX_O_OTDC),
929*4882a593Smuzhiyun 	[BQ27520G1] = BQ27XXX_DATA(bq27520g1, 0         , BQ27XXX_O_OTDC),
930*4882a593Smuzhiyun 	[BQ27520G2] = BQ27XXX_DATA(bq27520g2, 0         , BQ27XXX_O_OTDC),
931*4882a593Smuzhiyun 	[BQ27520G3] = BQ27XXX_DATA(bq27520g3, 0         , BQ27XXX_O_OTDC),
932*4882a593Smuzhiyun 	[BQ27520G4] = BQ27XXX_DATA(bq27520g4, 0         , BQ27XXX_O_OTDC),
933*4882a593Smuzhiyun 	[BQ27521]   = BQ27XXX_DATA(bq27521,   0         , 0),
934*4882a593Smuzhiyun 	[BQ27530]   = BQ27XXX_DATA(bq27530,   0         , BQ27XXX_O_UTOT),
935*4882a593Smuzhiyun 	[BQ27531]   = BQ27XXX_DATA(bq27531,   0         , BQ27XXX_O_UTOT),
936*4882a593Smuzhiyun 	[BQ27541]   = BQ27XXX_DATA(bq27541,   0         , BQ27XXX_O_OTDC),
937*4882a593Smuzhiyun 	[BQ27542]   = BQ27XXX_DATA(bq27542,   0         , BQ27XXX_O_OTDC),
938*4882a593Smuzhiyun 	[BQ27546]   = BQ27XXX_DATA(bq27546,   0         , BQ27XXX_O_OTDC),
939*4882a593Smuzhiyun 	[BQ27742]   = BQ27XXX_DATA(bq27742,   0         , BQ27XXX_O_OTDC),
940*4882a593Smuzhiyun 	[BQ27545]   = BQ27XXX_DATA(bq27545,   0x04143672, BQ27XXX_O_OTDC),
941*4882a593Smuzhiyun 	[BQ27411]   = BQ27XXX_DATA(bq27411,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
942*4882a593Smuzhiyun 	[BQ27421]   = BQ27XXX_DATA(bq27421,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
943*4882a593Smuzhiyun 	[BQ27425]   = BQ27XXX_DATA(bq27425,   0x04143672, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP),
944*4882a593Smuzhiyun 	[BQ27426]   = BQ27XXX_DATA(bq27426,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
945*4882a593Smuzhiyun 	[BQ27441]   = BQ27XXX_DATA(bq27441,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
946*4882a593Smuzhiyun 	[BQ27621]   = BQ27XXX_DATA(bq27621,   0x80008000, BQ27XXX_O_UTOT | BQ27XXX_O_CFGUP | BQ27XXX_O_RAM),
947*4882a593Smuzhiyun 	[BQ27Z561]  = BQ27XXX_DATA(bq27z561,  0         , BQ27Z561_O_BITS),
948*4882a593Smuzhiyun 	[BQ28Z610]  = BQ27XXX_DATA(bq28z610,  0         , BQ27Z561_O_BITS),
949*4882a593Smuzhiyun 	[BQ34Z100]  = BQ27XXX_DATA(bq34z100,  0         , BQ27XXX_O_OTDC | BQ27XXX_O_SOC_SI | \
950*4882a593Smuzhiyun 							  BQ27XXX_O_HAS_CI | BQ27XXX_O_MUL_CHEM),
951*4882a593Smuzhiyun };
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun static DEFINE_MUTEX(bq27xxx_list_lock);
954*4882a593Smuzhiyun static LIST_HEAD(bq27xxx_battery_devices);
955*4882a593Smuzhiyun 
956*4882a593Smuzhiyun #define BQ27XXX_MSLEEP(i) usleep_range((i)*1000, (i)*1000+500)
957*4882a593Smuzhiyun 
958*4882a593Smuzhiyun #define BQ27XXX_DM_SZ	32
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun /**
961*4882a593Smuzhiyun  * struct bq27xxx_dm_buf - chip data memory buffer
962*4882a593Smuzhiyun  * @class: data memory subclass_id
963*4882a593Smuzhiyun  * @block: data memory block number
964*4882a593Smuzhiyun  * @data: data from/for the block
965*4882a593Smuzhiyun  * @has_data: true if data has been filled by read
966*4882a593Smuzhiyun  * @dirty: true if data has changed since last read/write
967*4882a593Smuzhiyun  *
968*4882a593Smuzhiyun  * Encapsulates info required to manage chip data memory blocks.
969*4882a593Smuzhiyun  */
970*4882a593Smuzhiyun struct bq27xxx_dm_buf {
971*4882a593Smuzhiyun 	u8 class;
972*4882a593Smuzhiyun 	u8 block;
973*4882a593Smuzhiyun 	u8 data[BQ27XXX_DM_SZ];
974*4882a593Smuzhiyun 	bool has_data, dirty;
975*4882a593Smuzhiyun };
976*4882a593Smuzhiyun 
977*4882a593Smuzhiyun #define BQ27XXX_DM_BUF(di, i) { \
978*4882a593Smuzhiyun 	.class = (di)->dm_regs[i].subclass_id, \
979*4882a593Smuzhiyun 	.block = (di)->dm_regs[i].offset / BQ27XXX_DM_SZ, \
980*4882a593Smuzhiyun }
981*4882a593Smuzhiyun 
bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf * buf,struct bq27xxx_dm_reg * reg)982*4882a593Smuzhiyun static inline u16 *bq27xxx_dm_reg_ptr(struct bq27xxx_dm_buf *buf,
983*4882a593Smuzhiyun 				      struct bq27xxx_dm_reg *reg)
984*4882a593Smuzhiyun {
985*4882a593Smuzhiyun 	if (buf->class == reg->subclass_id &&
986*4882a593Smuzhiyun 	    buf->block == reg->offset / BQ27XXX_DM_SZ)
987*4882a593Smuzhiyun 		return (u16 *) (buf->data + reg->offset % BQ27XXX_DM_SZ);
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun 	return NULL;
990*4882a593Smuzhiyun }
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun static const char * const bq27xxx_dm_reg_name[] = {
993*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_CAPACITY] = "design-capacity",
994*4882a593Smuzhiyun 	[BQ27XXX_DM_DESIGN_ENERGY] = "design-energy",
995*4882a593Smuzhiyun 	[BQ27XXX_DM_TERMINATE_VOLTAGE] = "terminate-voltage",
996*4882a593Smuzhiyun };
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun static bool bq27xxx_dt_to_nvm = true;
1000*4882a593Smuzhiyun module_param_named(dt_monitored_battery_updates_nvm, bq27xxx_dt_to_nvm, bool, 0444);
1001*4882a593Smuzhiyun MODULE_PARM_DESC(dt_monitored_battery_updates_nvm,
1002*4882a593Smuzhiyun 	"Devicetree monitored-battery config updates data memory on NVM/flash chips.\n"
1003*4882a593Smuzhiyun 	"Users must set this =0 when installing a different type of battery!\n"
1004*4882a593Smuzhiyun 	"Default is =1."
1005*4882a593Smuzhiyun #ifndef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1006*4882a593Smuzhiyun 	"\nSetting this affects future kernel updates, not the current configuration."
1007*4882a593Smuzhiyun #endif
1008*4882a593Smuzhiyun );
1009*4882a593Smuzhiyun 
poll_interval_param_set(const char * val,const struct kernel_param * kp)1010*4882a593Smuzhiyun static int poll_interval_param_set(const char *val, const struct kernel_param *kp)
1011*4882a593Smuzhiyun {
1012*4882a593Smuzhiyun 	struct bq27xxx_device_info *di;
1013*4882a593Smuzhiyun 	unsigned int prev_val = *(unsigned int *) kp->arg;
1014*4882a593Smuzhiyun 	int ret;
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun 	ret = param_set_uint(val, kp);
1017*4882a593Smuzhiyun 	if (ret < 0 || prev_val == *(unsigned int *) kp->arg)
1018*4882a593Smuzhiyun 		return ret;
1019*4882a593Smuzhiyun 
1020*4882a593Smuzhiyun 	mutex_lock(&bq27xxx_list_lock);
1021*4882a593Smuzhiyun 	list_for_each_entry(di, &bq27xxx_battery_devices, list) {
1022*4882a593Smuzhiyun 		cancel_delayed_work_sync(&di->work);
1023*4882a593Smuzhiyun 		schedule_delayed_work(&di->work, 0);
1024*4882a593Smuzhiyun 	}
1025*4882a593Smuzhiyun 	mutex_unlock(&bq27xxx_list_lock);
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun 	return ret;
1028*4882a593Smuzhiyun }
1029*4882a593Smuzhiyun 
1030*4882a593Smuzhiyun static const struct kernel_param_ops param_ops_poll_interval = {
1031*4882a593Smuzhiyun 	.get = param_get_uint,
1032*4882a593Smuzhiyun 	.set = poll_interval_param_set,
1033*4882a593Smuzhiyun };
1034*4882a593Smuzhiyun 
1035*4882a593Smuzhiyun static unsigned int poll_interval = 360;
1036*4882a593Smuzhiyun module_param_cb(poll_interval, &param_ops_poll_interval, &poll_interval, 0644);
1037*4882a593Smuzhiyun MODULE_PARM_DESC(poll_interval,
1038*4882a593Smuzhiyun 		 "battery poll interval in seconds - 0 disables polling");
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun /*
1041*4882a593Smuzhiyun  * Common code for BQ27xxx devices
1042*4882a593Smuzhiyun  */
1043*4882a593Smuzhiyun 
bq27xxx_read(struct bq27xxx_device_info * di,int reg_index,bool single)1044*4882a593Smuzhiyun static inline int bq27xxx_read(struct bq27xxx_device_info *di, int reg_index,
1045*4882a593Smuzhiyun 			       bool single)
1046*4882a593Smuzhiyun {
1047*4882a593Smuzhiyun 	int ret;
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1050*4882a593Smuzhiyun 		return -EINVAL;
1051*4882a593Smuzhiyun 
1052*4882a593Smuzhiyun 	ret = di->bus.read(di, di->regs[reg_index], single);
1053*4882a593Smuzhiyun 	if (ret < 0)
1054*4882a593Smuzhiyun 		dev_dbg(di->dev, "failed to read register 0x%02x (index %d)\n",
1055*4882a593Smuzhiyun 			di->regs[reg_index], reg_index);
1056*4882a593Smuzhiyun 
1057*4882a593Smuzhiyun 	return ret;
1058*4882a593Smuzhiyun }
1059*4882a593Smuzhiyun 
bq27xxx_write(struct bq27xxx_device_info * di,int reg_index,u16 value,bool single)1060*4882a593Smuzhiyun static inline int bq27xxx_write(struct bq27xxx_device_info *di, int reg_index,
1061*4882a593Smuzhiyun 				u16 value, bool single)
1062*4882a593Smuzhiyun {
1063*4882a593Smuzhiyun 	int ret;
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1066*4882a593Smuzhiyun 		return -EINVAL;
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun 	if (!di->bus.write)
1069*4882a593Smuzhiyun 		return -EPERM;
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 	ret = di->bus.write(di, di->regs[reg_index], value, single);
1072*4882a593Smuzhiyun 	if (ret < 0)
1073*4882a593Smuzhiyun 		dev_dbg(di->dev, "failed to write register 0x%02x (index %d)\n",
1074*4882a593Smuzhiyun 			di->regs[reg_index], reg_index);
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	return ret;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun 
bq27xxx_read_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1079*4882a593Smuzhiyun static inline int bq27xxx_read_block(struct bq27xxx_device_info *di, int reg_index,
1080*4882a593Smuzhiyun 				     u8 *data, int len)
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun 	int ret;
1083*4882a593Smuzhiyun 
1084*4882a593Smuzhiyun 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1085*4882a593Smuzhiyun 		return -EINVAL;
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 	if (!di->bus.read_bulk)
1088*4882a593Smuzhiyun 		return -EPERM;
1089*4882a593Smuzhiyun 
1090*4882a593Smuzhiyun 	ret = di->bus.read_bulk(di, di->regs[reg_index], data, len);
1091*4882a593Smuzhiyun 	if (ret < 0)
1092*4882a593Smuzhiyun 		dev_dbg(di->dev, "failed to read_bulk register 0x%02x (index %d)\n",
1093*4882a593Smuzhiyun 			di->regs[reg_index], reg_index);
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun 	return ret;
1096*4882a593Smuzhiyun }
1097*4882a593Smuzhiyun 
bq27xxx_write_block(struct bq27xxx_device_info * di,int reg_index,u8 * data,int len)1098*4882a593Smuzhiyun static inline int bq27xxx_write_block(struct bq27xxx_device_info *di, int reg_index,
1099*4882a593Smuzhiyun 				      u8 *data, int len)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun 	int ret;
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	if (!di || di->regs[reg_index] == INVALID_REG_ADDR)
1104*4882a593Smuzhiyun 		return -EINVAL;
1105*4882a593Smuzhiyun 
1106*4882a593Smuzhiyun 	if (!di->bus.write_bulk)
1107*4882a593Smuzhiyun 		return -EPERM;
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun 	ret = di->bus.write_bulk(di, di->regs[reg_index], data, len);
1110*4882a593Smuzhiyun 	if (ret < 0)
1111*4882a593Smuzhiyun 		dev_dbg(di->dev, "failed to write_bulk register 0x%02x (index %d)\n",
1112*4882a593Smuzhiyun 			di->regs[reg_index], reg_index);
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun 	return ret;
1115*4882a593Smuzhiyun }
1116*4882a593Smuzhiyun 
bq27xxx_battery_seal(struct bq27xxx_device_info * di)1117*4882a593Smuzhiyun static int bq27xxx_battery_seal(struct bq27xxx_device_info *di)
1118*4882a593Smuzhiyun {
1119*4882a593Smuzhiyun 	int ret;
1120*4882a593Smuzhiyun 
1121*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_SEALED, false);
1122*4882a593Smuzhiyun 	if (ret < 0) {
1123*4882a593Smuzhiyun 		dev_err(di->dev, "bus error on seal: %d\n", ret);
1124*4882a593Smuzhiyun 		return ret;
1125*4882a593Smuzhiyun 	}
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun 	return 0;
1128*4882a593Smuzhiyun }
1129*4882a593Smuzhiyun 
bq27xxx_battery_unseal(struct bq27xxx_device_info * di)1130*4882a593Smuzhiyun static int bq27xxx_battery_unseal(struct bq27xxx_device_info *di)
1131*4882a593Smuzhiyun {
1132*4882a593Smuzhiyun 	int ret;
1133*4882a593Smuzhiyun 
1134*4882a593Smuzhiyun 	if (di->unseal_key == 0) {
1135*4882a593Smuzhiyun 		dev_err(di->dev, "unseal failed due to missing key\n");
1136*4882a593Smuzhiyun 		return -EINVAL;
1137*4882a593Smuzhiyun 	}
1138*4882a593Smuzhiyun 
1139*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)(di->unseal_key >> 16), false);
1140*4882a593Smuzhiyun 	if (ret < 0)
1141*4882a593Smuzhiyun 		goto out;
1142*4882a593Smuzhiyun 
1143*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, (u16)di->unseal_key, false);
1144*4882a593Smuzhiyun 	if (ret < 0)
1145*4882a593Smuzhiyun 		goto out;
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	return 0;
1148*4882a593Smuzhiyun 
1149*4882a593Smuzhiyun out:
1150*4882a593Smuzhiyun 	dev_err(di->dev, "bus error on unseal: %d\n", ret);
1151*4882a593Smuzhiyun 	return ret;
1152*4882a593Smuzhiyun }
1153*4882a593Smuzhiyun 
bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf * buf)1154*4882a593Smuzhiyun static u8 bq27xxx_battery_checksum_dm_block(struct bq27xxx_dm_buf *buf)
1155*4882a593Smuzhiyun {
1156*4882a593Smuzhiyun 	u16 sum = 0;
1157*4882a593Smuzhiyun 	int i;
1158*4882a593Smuzhiyun 
1159*4882a593Smuzhiyun 	for (i = 0; i < BQ27XXX_DM_SZ; i++)
1160*4882a593Smuzhiyun 		sum += buf->data[i];
1161*4882a593Smuzhiyun 	sum &= 0xff;
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun 	return 0xff - sum;
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun 
bq27xxx_battery_read_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf)1166*4882a593Smuzhiyun static int bq27xxx_battery_read_dm_block(struct bq27xxx_device_info *di,
1167*4882a593Smuzhiyun 					 struct bq27xxx_dm_buf *buf)
1168*4882a593Smuzhiyun {
1169*4882a593Smuzhiyun 	int ret;
1170*4882a593Smuzhiyun 
1171*4882a593Smuzhiyun 	buf->has_data = false;
1172*4882a593Smuzhiyun 
1173*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1174*4882a593Smuzhiyun 	if (ret < 0)
1175*4882a593Smuzhiyun 		goto out;
1176*4882a593Smuzhiyun 
1177*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1178*4882a593Smuzhiyun 	if (ret < 0)
1179*4882a593Smuzhiyun 		goto out;
1180*4882a593Smuzhiyun 
1181*4882a593Smuzhiyun 	BQ27XXX_MSLEEP(1);
1182*4882a593Smuzhiyun 
1183*4882a593Smuzhiyun 	ret = bq27xxx_read_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1184*4882a593Smuzhiyun 	if (ret < 0)
1185*4882a593Smuzhiyun 		goto out;
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun 	ret = bq27xxx_read(di, BQ27XXX_DM_CKSUM, true);
1188*4882a593Smuzhiyun 	if (ret < 0)
1189*4882a593Smuzhiyun 		goto out;
1190*4882a593Smuzhiyun 
1191*4882a593Smuzhiyun 	if ((u8)ret != bq27xxx_battery_checksum_dm_block(buf)) {
1192*4882a593Smuzhiyun 		ret = -EINVAL;
1193*4882a593Smuzhiyun 		goto out;
1194*4882a593Smuzhiyun 	}
1195*4882a593Smuzhiyun 
1196*4882a593Smuzhiyun 	buf->has_data = true;
1197*4882a593Smuzhiyun 	buf->dirty = false;
1198*4882a593Smuzhiyun 
1199*4882a593Smuzhiyun 	return 0;
1200*4882a593Smuzhiyun 
1201*4882a593Smuzhiyun out:
1202*4882a593Smuzhiyun 	dev_err(di->dev, "bus error reading chip memory: %d\n", ret);
1203*4882a593Smuzhiyun 	return ret;
1204*4882a593Smuzhiyun }
1205*4882a593Smuzhiyun 
bq27xxx_battery_update_dm_block(struct bq27xxx_device_info * di,struct bq27xxx_dm_buf * buf,enum bq27xxx_dm_reg_id reg_id,unsigned int val)1206*4882a593Smuzhiyun static void bq27xxx_battery_update_dm_block(struct bq27xxx_device_info *di,
1207*4882a593Smuzhiyun 					    struct bq27xxx_dm_buf *buf,
1208*4882a593Smuzhiyun 					    enum bq27xxx_dm_reg_id reg_id,
1209*4882a593Smuzhiyun 					    unsigned int val)
1210*4882a593Smuzhiyun {
1211*4882a593Smuzhiyun 	struct bq27xxx_dm_reg *reg = &di->dm_regs[reg_id];
1212*4882a593Smuzhiyun 	const char *str = bq27xxx_dm_reg_name[reg_id];
1213*4882a593Smuzhiyun 	u16 *prev = bq27xxx_dm_reg_ptr(buf, reg);
1214*4882a593Smuzhiyun 
1215*4882a593Smuzhiyun 	if (prev == NULL) {
1216*4882a593Smuzhiyun 		dev_warn(di->dev, "buffer does not match %s dm spec\n", str);
1217*4882a593Smuzhiyun 		return;
1218*4882a593Smuzhiyun 	}
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun 	if (reg->bytes != 2) {
1221*4882a593Smuzhiyun 		dev_warn(di->dev, "%s dm spec has unsupported byte size\n", str);
1222*4882a593Smuzhiyun 		return;
1223*4882a593Smuzhiyun 	}
1224*4882a593Smuzhiyun 
1225*4882a593Smuzhiyun 	if (!buf->has_data)
1226*4882a593Smuzhiyun 		return;
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 	if (be16_to_cpup(prev) == val) {
1229*4882a593Smuzhiyun 		dev_info(di->dev, "%s has %u\n", str, val);
1230*4882a593Smuzhiyun 		return;
1231*4882a593Smuzhiyun 	}
1232*4882a593Smuzhiyun 
1233*4882a593Smuzhiyun #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1234*4882a593Smuzhiyun 	if (!(di->opts & BQ27XXX_O_RAM) && !bq27xxx_dt_to_nvm) {
1235*4882a593Smuzhiyun #else
1236*4882a593Smuzhiyun 	if (!(di->opts & BQ27XXX_O_RAM)) {
1237*4882a593Smuzhiyun #endif
1238*4882a593Smuzhiyun 		/* devicetree and NVM differ; defer to NVM */
1239*4882a593Smuzhiyun 		dev_warn(di->dev, "%s has %u; update to %u disallowed "
1240*4882a593Smuzhiyun #ifdef CONFIG_BATTERY_BQ27XXX_DT_UPDATES_NVM
1241*4882a593Smuzhiyun 			 "by dt_monitored_battery_updates_nvm=0"
1242*4882a593Smuzhiyun #else
1243*4882a593Smuzhiyun 			 "for flash/NVM data memory"
1244*4882a593Smuzhiyun #endif
1245*4882a593Smuzhiyun 			 "\n", str, be16_to_cpup(prev), val);
1246*4882a593Smuzhiyun 		return;
1247*4882a593Smuzhiyun 	}
1248*4882a593Smuzhiyun 
1249*4882a593Smuzhiyun 	dev_info(di->dev, "update %s to %u\n", str, val);
1250*4882a593Smuzhiyun 
1251*4882a593Smuzhiyun 	*prev = cpu_to_be16(val);
1252*4882a593Smuzhiyun 	buf->dirty = true;
1253*4882a593Smuzhiyun }
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun static int bq27xxx_battery_cfgupdate_priv(struct bq27xxx_device_info *di, bool active)
1256*4882a593Smuzhiyun {
1257*4882a593Smuzhiyun 	const int limit = 100;
1258*4882a593Smuzhiyun 	u16 cmd = active ? BQ27XXX_SET_CFGUPDATE : BQ27XXX_SOFT_RESET;
1259*4882a593Smuzhiyun 	int ret, try = limit;
1260*4882a593Smuzhiyun 
1261*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_REG_CTRL, cmd, false);
1262*4882a593Smuzhiyun 	if (ret < 0)
1263*4882a593Smuzhiyun 		return ret;
1264*4882a593Smuzhiyun 
1265*4882a593Smuzhiyun 	do {
1266*4882a593Smuzhiyun 		BQ27XXX_MSLEEP(25);
1267*4882a593Smuzhiyun 		ret = bq27xxx_read(di, BQ27XXX_REG_FLAGS, false);
1268*4882a593Smuzhiyun 		if (ret < 0)
1269*4882a593Smuzhiyun 			return ret;
1270*4882a593Smuzhiyun 	} while (!!(ret & BQ27XXX_FLAG_CFGUP) != active && --try);
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 	if (!try && di->chip != BQ27425) { // 425 has a bug
1273*4882a593Smuzhiyun 		dev_err(di->dev, "timed out waiting for cfgupdate flag %d\n", active);
1274*4882a593Smuzhiyun 		return -EINVAL;
1275*4882a593Smuzhiyun 	}
1276*4882a593Smuzhiyun 
1277*4882a593Smuzhiyun 	if (limit - try > 3)
1278*4882a593Smuzhiyun 		dev_warn(di->dev, "cfgupdate %d, retries %d\n", active, limit - try);
1279*4882a593Smuzhiyun 
1280*4882a593Smuzhiyun 	return 0;
1281*4882a593Smuzhiyun }
1282*4882a593Smuzhiyun 
1283*4882a593Smuzhiyun static inline int bq27xxx_battery_set_cfgupdate(struct bq27xxx_device_info *di)
1284*4882a593Smuzhiyun {
1285*4882a593Smuzhiyun 	int ret = bq27xxx_battery_cfgupdate_priv(di, true);
1286*4882a593Smuzhiyun 	if (ret < 0 && ret != -EINVAL)
1287*4882a593Smuzhiyun 		dev_err(di->dev, "bus error on set_cfgupdate: %d\n", ret);
1288*4882a593Smuzhiyun 
1289*4882a593Smuzhiyun 	return ret;
1290*4882a593Smuzhiyun }
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun static inline int bq27xxx_battery_soft_reset(struct bq27xxx_device_info *di)
1293*4882a593Smuzhiyun {
1294*4882a593Smuzhiyun 	int ret = bq27xxx_battery_cfgupdate_priv(di, false);
1295*4882a593Smuzhiyun 	if (ret < 0 && ret != -EINVAL)
1296*4882a593Smuzhiyun 		dev_err(di->dev, "bus error on soft_reset: %d\n", ret);
1297*4882a593Smuzhiyun 
1298*4882a593Smuzhiyun 	return ret;
1299*4882a593Smuzhiyun }
1300*4882a593Smuzhiyun 
1301*4882a593Smuzhiyun static int bq27xxx_battery_write_dm_block(struct bq27xxx_device_info *di,
1302*4882a593Smuzhiyun 					  struct bq27xxx_dm_buf *buf)
1303*4882a593Smuzhiyun {
1304*4882a593Smuzhiyun 	bool cfgup = di->opts & BQ27XXX_O_CFGUP;
1305*4882a593Smuzhiyun 	int ret;
1306*4882a593Smuzhiyun 
1307*4882a593Smuzhiyun 	if (!buf->dirty)
1308*4882a593Smuzhiyun 		return 0;
1309*4882a593Smuzhiyun 
1310*4882a593Smuzhiyun 	if (cfgup) {
1311*4882a593Smuzhiyun 		ret = bq27xxx_battery_set_cfgupdate(di);
1312*4882a593Smuzhiyun 		if (ret < 0)
1313*4882a593Smuzhiyun 			return ret;
1314*4882a593Smuzhiyun 	}
1315*4882a593Smuzhiyun 
1316*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_DM_CTRL, 0, true);
1317*4882a593Smuzhiyun 	if (ret < 0)
1318*4882a593Smuzhiyun 		goto out;
1319*4882a593Smuzhiyun 
1320*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_DM_CLASS, buf->class, true);
1321*4882a593Smuzhiyun 	if (ret < 0)
1322*4882a593Smuzhiyun 		goto out;
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_DM_BLOCK, buf->block, true);
1325*4882a593Smuzhiyun 	if (ret < 0)
1326*4882a593Smuzhiyun 		goto out;
1327*4882a593Smuzhiyun 
1328*4882a593Smuzhiyun 	BQ27XXX_MSLEEP(1);
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun 	ret = bq27xxx_write_block(di, BQ27XXX_DM_DATA, buf->data, BQ27XXX_DM_SZ);
1331*4882a593Smuzhiyun 	if (ret < 0)
1332*4882a593Smuzhiyun 		goto out;
1333*4882a593Smuzhiyun 
1334*4882a593Smuzhiyun 	ret = bq27xxx_write(di, BQ27XXX_DM_CKSUM,
1335*4882a593Smuzhiyun 			    bq27xxx_battery_checksum_dm_block(buf), true);
1336*4882a593Smuzhiyun 	if (ret < 0)
1337*4882a593Smuzhiyun 		goto out;
1338*4882a593Smuzhiyun 
1339*4882a593Smuzhiyun 	/* DO NOT read BQ27XXX_DM_CKSUM here to verify it! That may cause NVM
1340*4882a593Smuzhiyun 	 * corruption on the '425 chip (and perhaps others), which can damage
1341*4882a593Smuzhiyun 	 * the chip.
1342*4882a593Smuzhiyun 	 */
1343*4882a593Smuzhiyun 
1344*4882a593Smuzhiyun 	if (cfgup) {
1345*4882a593Smuzhiyun 		BQ27XXX_MSLEEP(1);
1346*4882a593Smuzhiyun 		ret = bq27xxx_battery_soft_reset(di);
1347*4882a593Smuzhiyun 		if (ret < 0)
1348*4882a593Smuzhiyun 			return ret;
1349*4882a593Smuzhiyun 	} else {
1350*4882a593Smuzhiyun 		BQ27XXX_MSLEEP(100); /* flash DM updates in <100ms */
1351*4882a593Smuzhiyun 	}
1352*4882a593Smuzhiyun 
1353*4882a593Smuzhiyun 	buf->dirty = false;
1354*4882a593Smuzhiyun 
1355*4882a593Smuzhiyun 	return 0;
1356*4882a593Smuzhiyun 
1357*4882a593Smuzhiyun out:
1358*4882a593Smuzhiyun 	if (cfgup)
1359*4882a593Smuzhiyun 		bq27xxx_battery_soft_reset(di);
1360*4882a593Smuzhiyun 
1361*4882a593Smuzhiyun 	dev_err(di->dev, "bus error writing chip memory: %d\n", ret);
1362*4882a593Smuzhiyun 	return ret;
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun 
1365*4882a593Smuzhiyun static void bq27xxx_battery_set_config(struct bq27xxx_device_info *di,
1366*4882a593Smuzhiyun 				       struct power_supply_battery_info *info)
1367*4882a593Smuzhiyun {
1368*4882a593Smuzhiyun 	struct bq27xxx_dm_buf bd = BQ27XXX_DM_BUF(di, BQ27XXX_DM_DESIGN_CAPACITY);
1369*4882a593Smuzhiyun 	struct bq27xxx_dm_buf bt = BQ27XXX_DM_BUF(di, BQ27XXX_DM_TERMINATE_VOLTAGE);
1370*4882a593Smuzhiyun 	bool updated;
1371*4882a593Smuzhiyun 
1372*4882a593Smuzhiyun 	if (bq27xxx_battery_unseal(di) < 0)
1373*4882a593Smuzhiyun 		return;
1374*4882a593Smuzhiyun 
1375*4882a593Smuzhiyun 	if (info->charge_full_design_uah != -EINVAL &&
1376*4882a593Smuzhiyun 	    info->energy_full_design_uwh != -EINVAL) {
1377*4882a593Smuzhiyun 		bq27xxx_battery_read_dm_block(di, &bd);
1378*4882a593Smuzhiyun 		/* assume design energy & capacity are in same block */
1379*4882a593Smuzhiyun 		bq27xxx_battery_update_dm_block(di, &bd,
1380*4882a593Smuzhiyun 					BQ27XXX_DM_DESIGN_CAPACITY,
1381*4882a593Smuzhiyun 					info->charge_full_design_uah / 1000);
1382*4882a593Smuzhiyun 		bq27xxx_battery_update_dm_block(di, &bd,
1383*4882a593Smuzhiyun 					BQ27XXX_DM_DESIGN_ENERGY,
1384*4882a593Smuzhiyun 					info->energy_full_design_uwh / 1000);
1385*4882a593Smuzhiyun 	}
1386*4882a593Smuzhiyun 
1387*4882a593Smuzhiyun 	if (info->voltage_min_design_uv != -EINVAL) {
1388*4882a593Smuzhiyun 		bool same = bd.class == bt.class && bd.block == bt.block;
1389*4882a593Smuzhiyun 		if (!same)
1390*4882a593Smuzhiyun 			bq27xxx_battery_read_dm_block(di, &bt);
1391*4882a593Smuzhiyun 		bq27xxx_battery_update_dm_block(di, same ? &bd : &bt,
1392*4882a593Smuzhiyun 					BQ27XXX_DM_TERMINATE_VOLTAGE,
1393*4882a593Smuzhiyun 					info->voltage_min_design_uv / 1000);
1394*4882a593Smuzhiyun 	}
1395*4882a593Smuzhiyun 
1396*4882a593Smuzhiyun 	updated = bd.dirty || bt.dirty;
1397*4882a593Smuzhiyun 
1398*4882a593Smuzhiyun 	bq27xxx_battery_write_dm_block(di, &bd);
1399*4882a593Smuzhiyun 	bq27xxx_battery_write_dm_block(di, &bt);
1400*4882a593Smuzhiyun 
1401*4882a593Smuzhiyun 	bq27xxx_battery_seal(di);
1402*4882a593Smuzhiyun 
1403*4882a593Smuzhiyun 	if (updated && !(di->opts & BQ27XXX_O_CFGUP)) {
1404*4882a593Smuzhiyun 		bq27xxx_write(di, BQ27XXX_REG_CTRL, BQ27XXX_RESET, false);
1405*4882a593Smuzhiyun 		BQ27XXX_MSLEEP(300); /* reset time is not documented */
1406*4882a593Smuzhiyun 	}
1407*4882a593Smuzhiyun 	/* assume bq27xxx_battery_update() is called hereafter */
1408*4882a593Smuzhiyun }
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun static void bq27xxx_battery_settings(struct bq27xxx_device_info *di)
1411*4882a593Smuzhiyun {
1412*4882a593Smuzhiyun 	struct power_supply_battery_info info = {};
1413*4882a593Smuzhiyun 	unsigned int min, max;
1414*4882a593Smuzhiyun 
1415*4882a593Smuzhiyun 	if (power_supply_get_battery_info(di->bat, &info) < 0)
1416*4882a593Smuzhiyun 		return;
1417*4882a593Smuzhiyun 
1418*4882a593Smuzhiyun 	if (!di->dm_regs) {
1419*4882a593Smuzhiyun 		dev_warn(di->dev, "data memory update not supported for chip\n");
1420*4882a593Smuzhiyun 		return;
1421*4882a593Smuzhiyun 	}
1422*4882a593Smuzhiyun 
1423*4882a593Smuzhiyun 	if (info.energy_full_design_uwh != info.charge_full_design_uah) {
1424*4882a593Smuzhiyun 		if (info.energy_full_design_uwh == -EINVAL)
1425*4882a593Smuzhiyun 			dev_warn(di->dev, "missing battery:energy-full-design-microwatt-hours\n");
1426*4882a593Smuzhiyun 		else if (info.charge_full_design_uah == -EINVAL)
1427*4882a593Smuzhiyun 			dev_warn(di->dev, "missing battery:charge-full-design-microamp-hours\n");
1428*4882a593Smuzhiyun 	}
1429*4882a593Smuzhiyun 
1430*4882a593Smuzhiyun 	/* assume min == 0 */
1431*4882a593Smuzhiyun 	max = di->dm_regs[BQ27XXX_DM_DESIGN_ENERGY].max;
1432*4882a593Smuzhiyun 	if (info.energy_full_design_uwh > max * 1000) {
1433*4882a593Smuzhiyun 		dev_err(di->dev, "invalid battery:energy-full-design-microwatt-hours %d\n",
1434*4882a593Smuzhiyun 			info.energy_full_design_uwh);
1435*4882a593Smuzhiyun 		info.energy_full_design_uwh = -EINVAL;
1436*4882a593Smuzhiyun 	}
1437*4882a593Smuzhiyun 
1438*4882a593Smuzhiyun 	/* assume min == 0 */
1439*4882a593Smuzhiyun 	max = di->dm_regs[BQ27XXX_DM_DESIGN_CAPACITY].max;
1440*4882a593Smuzhiyun 	if (info.charge_full_design_uah > max * 1000) {
1441*4882a593Smuzhiyun 		dev_err(di->dev, "invalid battery:charge-full-design-microamp-hours %d\n",
1442*4882a593Smuzhiyun 			info.charge_full_design_uah);
1443*4882a593Smuzhiyun 		info.charge_full_design_uah = -EINVAL;
1444*4882a593Smuzhiyun 	}
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun 	min = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].min;
1447*4882a593Smuzhiyun 	max = di->dm_regs[BQ27XXX_DM_TERMINATE_VOLTAGE].max;
1448*4882a593Smuzhiyun 	if ((info.voltage_min_design_uv < min * 1000 ||
1449*4882a593Smuzhiyun 	     info.voltage_min_design_uv > max * 1000) &&
1450*4882a593Smuzhiyun 	     info.voltage_min_design_uv != -EINVAL) {
1451*4882a593Smuzhiyun 		dev_err(di->dev, "invalid battery:voltage-min-design-microvolt %d\n",
1452*4882a593Smuzhiyun 			info.voltage_min_design_uv);
1453*4882a593Smuzhiyun 		info.voltage_min_design_uv = -EINVAL;
1454*4882a593Smuzhiyun 	}
1455*4882a593Smuzhiyun 
1456*4882a593Smuzhiyun 	if ((info.energy_full_design_uwh != -EINVAL &&
1457*4882a593Smuzhiyun 	     info.charge_full_design_uah != -EINVAL) ||
1458*4882a593Smuzhiyun 	     info.voltage_min_design_uv  != -EINVAL)
1459*4882a593Smuzhiyun 		bq27xxx_battery_set_config(di, &info);
1460*4882a593Smuzhiyun }
1461*4882a593Smuzhiyun 
1462*4882a593Smuzhiyun /*
1463*4882a593Smuzhiyun  * Return the battery State-of-Charge
1464*4882a593Smuzhiyun  * Or < 0 if something fails.
1465*4882a593Smuzhiyun  */
1466*4882a593Smuzhiyun static int bq27xxx_battery_read_soc(struct bq27xxx_device_info *di)
1467*4882a593Smuzhiyun {
1468*4882a593Smuzhiyun 	int soc;
1469*4882a593Smuzhiyun 
1470*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_SOC_SI)
1471*4882a593Smuzhiyun 		soc = bq27xxx_read(di, BQ27XXX_REG_SOC, true);
1472*4882a593Smuzhiyun 	else
1473*4882a593Smuzhiyun 		soc = bq27xxx_read(di, BQ27XXX_REG_SOC, false);
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun 	if (soc < 0)
1476*4882a593Smuzhiyun 		dev_dbg(di->dev, "error reading State-of-Charge\n");
1477*4882a593Smuzhiyun 
1478*4882a593Smuzhiyun 	return soc;
1479*4882a593Smuzhiyun }
1480*4882a593Smuzhiyun 
1481*4882a593Smuzhiyun /*
1482*4882a593Smuzhiyun  * Return a battery charge value in µAh
1483*4882a593Smuzhiyun  * Or < 0 if something fails.
1484*4882a593Smuzhiyun  */
1485*4882a593Smuzhiyun static int bq27xxx_battery_read_charge(struct bq27xxx_device_info *di, u8 reg)
1486*4882a593Smuzhiyun {
1487*4882a593Smuzhiyun 	int charge;
1488*4882a593Smuzhiyun 
1489*4882a593Smuzhiyun 	charge = bq27xxx_read(di, reg, false);
1490*4882a593Smuzhiyun 	if (charge < 0) {
1491*4882a593Smuzhiyun 		dev_dbg(di->dev, "error reading charge register %02x: %d\n",
1492*4882a593Smuzhiyun 			reg, charge);
1493*4882a593Smuzhiyun 		return charge;
1494*4882a593Smuzhiyun 	}
1495*4882a593Smuzhiyun 
1496*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO)
1497*4882a593Smuzhiyun 		charge *= BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1498*4882a593Smuzhiyun 	else
1499*4882a593Smuzhiyun 		charge *= 1000;
1500*4882a593Smuzhiyun 
1501*4882a593Smuzhiyun 	return charge;
1502*4882a593Smuzhiyun }
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun /*
1505*4882a593Smuzhiyun  * Return the battery Nominal available capacity in µAh
1506*4882a593Smuzhiyun  * Or < 0 if something fails.
1507*4882a593Smuzhiyun  */
1508*4882a593Smuzhiyun static inline int bq27xxx_battery_read_nac(struct bq27xxx_device_info *di)
1509*4882a593Smuzhiyun {
1510*4882a593Smuzhiyun 	int flags;
1511*4882a593Smuzhiyun 
1512*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO) {
1513*4882a593Smuzhiyun 		flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1514*4882a593Smuzhiyun 		if (flags >= 0 && (flags & BQ27000_FLAG_CI))
1515*4882a593Smuzhiyun 			return -ENODATA;
1516*4882a593Smuzhiyun 	}
1517*4882a593Smuzhiyun 
1518*4882a593Smuzhiyun 	return bq27xxx_battery_read_charge(di, BQ27XXX_REG_NAC);
1519*4882a593Smuzhiyun }
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun /*
1522*4882a593Smuzhiyun  * Return the battery Full Charge Capacity in µAh
1523*4882a593Smuzhiyun  * Or < 0 if something fails.
1524*4882a593Smuzhiyun  */
1525*4882a593Smuzhiyun static inline int bq27xxx_battery_read_fcc(struct bq27xxx_device_info *di)
1526*4882a593Smuzhiyun {
1527*4882a593Smuzhiyun 	return bq27xxx_battery_read_charge(di, BQ27XXX_REG_FCC);
1528*4882a593Smuzhiyun }
1529*4882a593Smuzhiyun 
1530*4882a593Smuzhiyun /*
1531*4882a593Smuzhiyun  * Return the Design Capacity in µAh
1532*4882a593Smuzhiyun  * Or < 0 if something fails.
1533*4882a593Smuzhiyun  */
1534*4882a593Smuzhiyun static int bq27xxx_battery_read_dcap(struct bq27xxx_device_info *di)
1535*4882a593Smuzhiyun {
1536*4882a593Smuzhiyun 	int dcap;
1537*4882a593Smuzhiyun 
1538*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO)
1539*4882a593Smuzhiyun 		dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, true);
1540*4882a593Smuzhiyun 	else
1541*4882a593Smuzhiyun 		dcap = bq27xxx_read(di, BQ27XXX_REG_DCAP, false);
1542*4882a593Smuzhiyun 
1543*4882a593Smuzhiyun 	if (dcap < 0) {
1544*4882a593Smuzhiyun 		dev_dbg(di->dev, "error reading initial last measured discharge\n");
1545*4882a593Smuzhiyun 		return dcap;
1546*4882a593Smuzhiyun 	}
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO)
1549*4882a593Smuzhiyun 		dcap = (dcap << 8) * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1550*4882a593Smuzhiyun 	else
1551*4882a593Smuzhiyun 		dcap *= 1000;
1552*4882a593Smuzhiyun 
1553*4882a593Smuzhiyun 	return dcap;
1554*4882a593Smuzhiyun }
1555*4882a593Smuzhiyun 
1556*4882a593Smuzhiyun /*
1557*4882a593Smuzhiyun  * Return the battery Available energy in µWh
1558*4882a593Smuzhiyun  * Or < 0 if something fails.
1559*4882a593Smuzhiyun  */
1560*4882a593Smuzhiyun static int bq27xxx_battery_read_energy(struct bq27xxx_device_info *di)
1561*4882a593Smuzhiyun {
1562*4882a593Smuzhiyun 	int ae;
1563*4882a593Smuzhiyun 
1564*4882a593Smuzhiyun 	ae = bq27xxx_read(di, BQ27XXX_REG_AE, false);
1565*4882a593Smuzhiyun 	if (ae < 0) {
1566*4882a593Smuzhiyun 		dev_dbg(di->dev, "error reading available energy\n");
1567*4882a593Smuzhiyun 		return ae;
1568*4882a593Smuzhiyun 	}
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO)
1571*4882a593Smuzhiyun 		ae *= BQ27XXX_POWER_CONSTANT / BQ27XXX_RS;
1572*4882a593Smuzhiyun 	else
1573*4882a593Smuzhiyun 		ae *= 1000;
1574*4882a593Smuzhiyun 
1575*4882a593Smuzhiyun 	return ae;
1576*4882a593Smuzhiyun }
1577*4882a593Smuzhiyun 
1578*4882a593Smuzhiyun /*
1579*4882a593Smuzhiyun  * Return the battery temperature in tenths of degree Kelvin
1580*4882a593Smuzhiyun  * Or < 0 if something fails.
1581*4882a593Smuzhiyun  */
1582*4882a593Smuzhiyun static int bq27xxx_battery_read_temperature(struct bq27xxx_device_info *di)
1583*4882a593Smuzhiyun {
1584*4882a593Smuzhiyun 	int temp;
1585*4882a593Smuzhiyun 
1586*4882a593Smuzhiyun 	temp = bq27xxx_read(di, BQ27XXX_REG_TEMP, false);
1587*4882a593Smuzhiyun 	if (temp < 0) {
1588*4882a593Smuzhiyun 		dev_err(di->dev, "error reading temperature\n");
1589*4882a593Smuzhiyun 		return temp;
1590*4882a593Smuzhiyun 	}
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO)
1593*4882a593Smuzhiyun 		temp = 5 * temp / 2;
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun 	return temp;
1596*4882a593Smuzhiyun }
1597*4882a593Smuzhiyun 
1598*4882a593Smuzhiyun /*
1599*4882a593Smuzhiyun  * Return the battery Cycle count total
1600*4882a593Smuzhiyun  * Or < 0 if something fails.
1601*4882a593Smuzhiyun  */
1602*4882a593Smuzhiyun static int bq27xxx_battery_read_cyct(struct bq27xxx_device_info *di)
1603*4882a593Smuzhiyun {
1604*4882a593Smuzhiyun 	int cyct;
1605*4882a593Smuzhiyun 
1606*4882a593Smuzhiyun 	cyct = bq27xxx_read(di, BQ27XXX_REG_CYCT, false);
1607*4882a593Smuzhiyun 	if (cyct < 0)
1608*4882a593Smuzhiyun 		dev_err(di->dev, "error reading cycle count total\n");
1609*4882a593Smuzhiyun 
1610*4882a593Smuzhiyun 	return cyct;
1611*4882a593Smuzhiyun }
1612*4882a593Smuzhiyun 
1613*4882a593Smuzhiyun /*
1614*4882a593Smuzhiyun  * Read a time register.
1615*4882a593Smuzhiyun  * Return < 0 if something fails.
1616*4882a593Smuzhiyun  */
1617*4882a593Smuzhiyun static int bq27xxx_battery_read_time(struct bq27xxx_device_info *di, u8 reg)
1618*4882a593Smuzhiyun {
1619*4882a593Smuzhiyun 	int tval;
1620*4882a593Smuzhiyun 
1621*4882a593Smuzhiyun 	tval = bq27xxx_read(di, reg, false);
1622*4882a593Smuzhiyun 	if (tval < 0) {
1623*4882a593Smuzhiyun 		dev_dbg(di->dev, "error reading time register %02x: %d\n",
1624*4882a593Smuzhiyun 			reg, tval);
1625*4882a593Smuzhiyun 		return tval;
1626*4882a593Smuzhiyun 	}
1627*4882a593Smuzhiyun 
1628*4882a593Smuzhiyun 	if (tval == 65535)
1629*4882a593Smuzhiyun 		return -ENODATA;
1630*4882a593Smuzhiyun 
1631*4882a593Smuzhiyun 	return tval * 60;
1632*4882a593Smuzhiyun }
1633*4882a593Smuzhiyun 
1634*4882a593Smuzhiyun /*
1635*4882a593Smuzhiyun  * Returns true if a battery over temperature condition is detected
1636*4882a593Smuzhiyun  */
1637*4882a593Smuzhiyun static bool bq27xxx_battery_overtemp(struct bq27xxx_device_info *di, u16 flags)
1638*4882a593Smuzhiyun {
1639*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_OTDC)
1640*4882a593Smuzhiyun 		return flags & (BQ27XXX_FLAG_OTC | BQ27XXX_FLAG_OTD);
1641*4882a593Smuzhiyun         if (di->opts & BQ27XXX_O_UTOT)
1642*4882a593Smuzhiyun 		return flags & BQ27XXX_FLAG_OT;
1643*4882a593Smuzhiyun 
1644*4882a593Smuzhiyun 	return false;
1645*4882a593Smuzhiyun }
1646*4882a593Smuzhiyun 
1647*4882a593Smuzhiyun /*
1648*4882a593Smuzhiyun  * Returns true if a battery under temperature condition is detected
1649*4882a593Smuzhiyun  */
1650*4882a593Smuzhiyun static bool bq27xxx_battery_undertemp(struct bq27xxx_device_info *di, u16 flags)
1651*4882a593Smuzhiyun {
1652*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_UTOT)
1653*4882a593Smuzhiyun 		return flags & BQ27XXX_FLAG_UT;
1654*4882a593Smuzhiyun 
1655*4882a593Smuzhiyun 	return false;
1656*4882a593Smuzhiyun }
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun /*
1659*4882a593Smuzhiyun  * Returns true if a low state of charge condition is detected
1660*4882a593Smuzhiyun  */
1661*4882a593Smuzhiyun static bool bq27xxx_battery_dead(struct bq27xxx_device_info *di, u16 flags)
1662*4882a593Smuzhiyun {
1663*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO)
1664*4882a593Smuzhiyun 		return flags & (BQ27000_FLAG_EDV1 | BQ27000_FLAG_EDVF);
1665*4882a593Smuzhiyun 	else if (di->opts & BQ27Z561_O_BITS)
1666*4882a593Smuzhiyun 		return flags & BQ27Z561_FLAG_FDC;
1667*4882a593Smuzhiyun 	else
1668*4882a593Smuzhiyun 		return flags & (BQ27XXX_FLAG_SOC1 | BQ27XXX_FLAG_SOCF);
1669*4882a593Smuzhiyun }
1670*4882a593Smuzhiyun 
1671*4882a593Smuzhiyun static int bq27xxx_battery_read_health(struct bq27xxx_device_info *di)
1672*4882a593Smuzhiyun {
1673*4882a593Smuzhiyun 	/* Unlikely but important to return first */
1674*4882a593Smuzhiyun 	if (unlikely(bq27xxx_battery_overtemp(di, di->cache.flags)))
1675*4882a593Smuzhiyun 		return POWER_SUPPLY_HEALTH_OVERHEAT;
1676*4882a593Smuzhiyun 	if (unlikely(bq27xxx_battery_undertemp(di, di->cache.flags)))
1677*4882a593Smuzhiyun 		return POWER_SUPPLY_HEALTH_COLD;
1678*4882a593Smuzhiyun 	if (unlikely(bq27xxx_battery_dead(di, di->cache.flags)))
1679*4882a593Smuzhiyun 		return POWER_SUPPLY_HEALTH_DEAD;
1680*4882a593Smuzhiyun 
1681*4882a593Smuzhiyun 	return POWER_SUPPLY_HEALTH_GOOD;
1682*4882a593Smuzhiyun }
1683*4882a593Smuzhiyun 
1684*4882a593Smuzhiyun void bq27xxx_battery_update(struct bq27xxx_device_info *di)
1685*4882a593Smuzhiyun {
1686*4882a593Smuzhiyun 	struct bq27xxx_reg_cache cache = {0, };
1687*4882a593Smuzhiyun 	bool has_ci_flag = di->opts & BQ27XXX_O_HAS_CI;
1688*4882a593Smuzhiyun 	bool has_singe_flag = di->opts & BQ27XXX_O_ZERO;
1689*4882a593Smuzhiyun 
1690*4882a593Smuzhiyun 	cache.flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, has_singe_flag);
1691*4882a593Smuzhiyun 	if ((cache.flags & 0xff) == 0xff)
1692*4882a593Smuzhiyun 		cache.flags = -1; /* read error */
1693*4882a593Smuzhiyun 	if (cache.flags >= 0) {
1694*4882a593Smuzhiyun 		cache.temperature = bq27xxx_battery_read_temperature(di);
1695*4882a593Smuzhiyun 		if (has_ci_flag && (cache.flags & BQ27000_FLAG_CI)) {
1696*4882a593Smuzhiyun 			dev_info_once(di->dev, "battery is not calibrated! ignoring capacity values\n");
1697*4882a593Smuzhiyun 			cache.capacity = -ENODATA;
1698*4882a593Smuzhiyun 			cache.energy = -ENODATA;
1699*4882a593Smuzhiyun 			cache.time_to_empty = -ENODATA;
1700*4882a593Smuzhiyun 			cache.time_to_empty_avg = -ENODATA;
1701*4882a593Smuzhiyun 			cache.time_to_full = -ENODATA;
1702*4882a593Smuzhiyun 			cache.charge_full = -ENODATA;
1703*4882a593Smuzhiyun 			cache.health = -ENODATA;
1704*4882a593Smuzhiyun 		} else {
1705*4882a593Smuzhiyun 			if (di->regs[BQ27XXX_REG_TTE] != INVALID_REG_ADDR)
1706*4882a593Smuzhiyun 				cache.time_to_empty = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTE);
1707*4882a593Smuzhiyun 			if (di->regs[BQ27XXX_REG_TTECP] != INVALID_REG_ADDR)
1708*4882a593Smuzhiyun 				cache.time_to_empty_avg = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTECP);
1709*4882a593Smuzhiyun 			if (di->regs[BQ27XXX_REG_TTF] != INVALID_REG_ADDR)
1710*4882a593Smuzhiyun 				cache.time_to_full = bq27xxx_battery_read_time(di, BQ27XXX_REG_TTF);
1711*4882a593Smuzhiyun 
1712*4882a593Smuzhiyun 			cache.charge_full = bq27xxx_battery_read_fcc(di);
1713*4882a593Smuzhiyun 			cache.capacity = bq27xxx_battery_read_soc(di);
1714*4882a593Smuzhiyun 			if (di->regs[BQ27XXX_REG_AE] != INVALID_REG_ADDR)
1715*4882a593Smuzhiyun 				cache.energy = bq27xxx_battery_read_energy(di);
1716*4882a593Smuzhiyun 			di->cache.flags = cache.flags;
1717*4882a593Smuzhiyun 			cache.health = bq27xxx_battery_read_health(di);
1718*4882a593Smuzhiyun 		}
1719*4882a593Smuzhiyun 		if (di->regs[BQ27XXX_REG_CYCT] != INVALID_REG_ADDR)
1720*4882a593Smuzhiyun 			cache.cycle_count = bq27xxx_battery_read_cyct(di);
1721*4882a593Smuzhiyun 
1722*4882a593Smuzhiyun 		/* We only have to read charge design full once */
1723*4882a593Smuzhiyun 		if (di->charge_design_full <= 0)
1724*4882a593Smuzhiyun 			di->charge_design_full = bq27xxx_battery_read_dcap(di);
1725*4882a593Smuzhiyun 	}
1726*4882a593Smuzhiyun 
1727*4882a593Smuzhiyun 	if ((di->cache.capacity != cache.capacity) ||
1728*4882a593Smuzhiyun 	    (di->cache.flags != cache.flags))
1729*4882a593Smuzhiyun 		power_supply_changed(di->bat);
1730*4882a593Smuzhiyun 
1731*4882a593Smuzhiyun 	if (memcmp(&di->cache, &cache, sizeof(cache)) != 0)
1732*4882a593Smuzhiyun 		di->cache = cache;
1733*4882a593Smuzhiyun 
1734*4882a593Smuzhiyun 	di->last_update = jiffies;
1735*4882a593Smuzhiyun }
1736*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(bq27xxx_battery_update);
1737*4882a593Smuzhiyun 
1738*4882a593Smuzhiyun static void bq27xxx_battery_poll(struct work_struct *work)
1739*4882a593Smuzhiyun {
1740*4882a593Smuzhiyun 	struct bq27xxx_device_info *di =
1741*4882a593Smuzhiyun 			container_of(work, struct bq27xxx_device_info,
1742*4882a593Smuzhiyun 				     work.work);
1743*4882a593Smuzhiyun 
1744*4882a593Smuzhiyun 	bq27xxx_battery_update(di);
1745*4882a593Smuzhiyun 
1746*4882a593Smuzhiyun 	if (poll_interval > 0)
1747*4882a593Smuzhiyun 		schedule_delayed_work(&di->work, poll_interval * HZ);
1748*4882a593Smuzhiyun }
1749*4882a593Smuzhiyun 
1750*4882a593Smuzhiyun /*
1751*4882a593Smuzhiyun  * Return the battery average current in µA
1752*4882a593Smuzhiyun  * Note that current can be negative signed as well
1753*4882a593Smuzhiyun  * Or 0 if something fails.
1754*4882a593Smuzhiyun  */
1755*4882a593Smuzhiyun static int bq27xxx_battery_current(struct bq27xxx_device_info *di,
1756*4882a593Smuzhiyun 				   union power_supply_propval *val)
1757*4882a593Smuzhiyun {
1758*4882a593Smuzhiyun 	int curr;
1759*4882a593Smuzhiyun 	int flags;
1760*4882a593Smuzhiyun 
1761*4882a593Smuzhiyun 	curr = bq27xxx_read(di, BQ27XXX_REG_AI, false);
1762*4882a593Smuzhiyun 	if (curr < 0) {
1763*4882a593Smuzhiyun 		dev_err(di->dev, "error reading current\n");
1764*4882a593Smuzhiyun 		return curr;
1765*4882a593Smuzhiyun 	}
1766*4882a593Smuzhiyun 
1767*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO) {
1768*4882a593Smuzhiyun 		flags = bq27xxx_read(di, BQ27XXX_REG_FLAGS, true);
1769*4882a593Smuzhiyun 		if (flags & BQ27000_FLAG_CHGS) {
1770*4882a593Smuzhiyun 			dev_dbg(di->dev, "negative current!\n");
1771*4882a593Smuzhiyun 			curr = -curr;
1772*4882a593Smuzhiyun 		}
1773*4882a593Smuzhiyun 
1774*4882a593Smuzhiyun 		val->intval = curr * BQ27XXX_CURRENT_CONSTANT / BQ27XXX_RS;
1775*4882a593Smuzhiyun 	} else {
1776*4882a593Smuzhiyun 		/* Other gauges return signed value */
1777*4882a593Smuzhiyun 		val->intval = (int)((s16)curr) * 1000;
1778*4882a593Smuzhiyun 	}
1779*4882a593Smuzhiyun 
1780*4882a593Smuzhiyun 	return 0;
1781*4882a593Smuzhiyun }
1782*4882a593Smuzhiyun 
1783*4882a593Smuzhiyun /*
1784*4882a593Smuzhiyun  * Get the average power in µW
1785*4882a593Smuzhiyun  * Return < 0 if something fails.
1786*4882a593Smuzhiyun  */
1787*4882a593Smuzhiyun static int bq27xxx_battery_pwr_avg(struct bq27xxx_device_info *di,
1788*4882a593Smuzhiyun 				   union power_supply_propval *val)
1789*4882a593Smuzhiyun {
1790*4882a593Smuzhiyun 	int power;
1791*4882a593Smuzhiyun 
1792*4882a593Smuzhiyun 	power = bq27xxx_read(di, BQ27XXX_REG_AP, false);
1793*4882a593Smuzhiyun 	if (power < 0) {
1794*4882a593Smuzhiyun 		dev_err(di->dev,
1795*4882a593Smuzhiyun 			"error reading average power register %02x: %d\n",
1796*4882a593Smuzhiyun 			BQ27XXX_REG_AP, power);
1797*4882a593Smuzhiyun 		return power;
1798*4882a593Smuzhiyun 	}
1799*4882a593Smuzhiyun 
1800*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO)
1801*4882a593Smuzhiyun 		val->intval = (power * BQ27XXX_POWER_CONSTANT) / BQ27XXX_RS;
1802*4882a593Smuzhiyun 	else
1803*4882a593Smuzhiyun 		/* Other gauges return a signed value in units of 10mW */
1804*4882a593Smuzhiyun 		val->intval = (int)((s16)power) * 10000;
1805*4882a593Smuzhiyun 
1806*4882a593Smuzhiyun 	return 0;
1807*4882a593Smuzhiyun }
1808*4882a593Smuzhiyun 
1809*4882a593Smuzhiyun static int bq27xxx_battery_status(struct bq27xxx_device_info *di,
1810*4882a593Smuzhiyun 				  union power_supply_propval *val)
1811*4882a593Smuzhiyun {
1812*4882a593Smuzhiyun 	int status;
1813*4882a593Smuzhiyun 
1814*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO) {
1815*4882a593Smuzhiyun 		if (di->cache.flags & BQ27000_FLAG_FC)
1816*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_FULL;
1817*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27000_FLAG_CHGS)
1818*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_CHARGING;
1819*4882a593Smuzhiyun 		else
1820*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_DISCHARGING;
1821*4882a593Smuzhiyun 	} else if (di->opts & BQ27Z561_O_BITS) {
1822*4882a593Smuzhiyun 		if (di->cache.flags & BQ27Z561_FLAG_FC)
1823*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_FULL;
1824*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27Z561_FLAG_DIS_CH)
1825*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_DISCHARGING;
1826*4882a593Smuzhiyun 		else
1827*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_CHARGING;
1828*4882a593Smuzhiyun 	} else {
1829*4882a593Smuzhiyun 		if (di->cache.flags & BQ27XXX_FLAG_FC)
1830*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_FULL;
1831*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27XXX_FLAG_DSC)
1832*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_DISCHARGING;
1833*4882a593Smuzhiyun 		else
1834*4882a593Smuzhiyun 			status = POWER_SUPPLY_STATUS_CHARGING;
1835*4882a593Smuzhiyun 	}
1836*4882a593Smuzhiyun 
1837*4882a593Smuzhiyun 	if ((status == POWER_SUPPLY_STATUS_DISCHARGING) &&
1838*4882a593Smuzhiyun 	    (power_supply_am_i_supplied(di->bat) > 0))
1839*4882a593Smuzhiyun 		status = POWER_SUPPLY_STATUS_NOT_CHARGING;
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun 	val->intval = status;
1842*4882a593Smuzhiyun 
1843*4882a593Smuzhiyun 	return 0;
1844*4882a593Smuzhiyun }
1845*4882a593Smuzhiyun 
1846*4882a593Smuzhiyun static int bq27xxx_battery_capacity_level(struct bq27xxx_device_info *di,
1847*4882a593Smuzhiyun 					  union power_supply_propval *val)
1848*4882a593Smuzhiyun {
1849*4882a593Smuzhiyun 	int level;
1850*4882a593Smuzhiyun 
1851*4882a593Smuzhiyun 	if (di->opts & BQ27XXX_O_ZERO) {
1852*4882a593Smuzhiyun 		if (di->cache.flags & BQ27000_FLAG_FC)
1853*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1854*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27000_FLAG_EDV1)
1855*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1856*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27000_FLAG_EDVF)
1857*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1858*4882a593Smuzhiyun 		else
1859*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1860*4882a593Smuzhiyun 	} else if (di->opts & BQ27Z561_O_BITS) {
1861*4882a593Smuzhiyun 		if (di->cache.flags & BQ27Z561_FLAG_FC)
1862*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1863*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27Z561_FLAG_FDC)
1864*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1865*4882a593Smuzhiyun 		else
1866*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1867*4882a593Smuzhiyun 	} else {
1868*4882a593Smuzhiyun 		if (di->cache.flags & BQ27XXX_FLAG_FC)
1869*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_FULL;
1870*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27XXX_FLAG_SOC1)
1871*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_LOW;
1872*4882a593Smuzhiyun 		else if (di->cache.flags & BQ27XXX_FLAG_SOCF)
1873*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_CRITICAL;
1874*4882a593Smuzhiyun 		else
1875*4882a593Smuzhiyun 			level = POWER_SUPPLY_CAPACITY_LEVEL_NORMAL;
1876*4882a593Smuzhiyun 	}
1877*4882a593Smuzhiyun 
1878*4882a593Smuzhiyun 	val->intval = level;
1879*4882a593Smuzhiyun 
1880*4882a593Smuzhiyun 	return 0;
1881*4882a593Smuzhiyun }
1882*4882a593Smuzhiyun 
1883*4882a593Smuzhiyun /*
1884*4882a593Smuzhiyun  * Return the battery Voltage in millivolts
1885*4882a593Smuzhiyun  * Or < 0 if something fails.
1886*4882a593Smuzhiyun  */
1887*4882a593Smuzhiyun static int bq27xxx_battery_voltage(struct bq27xxx_device_info *di,
1888*4882a593Smuzhiyun 				   union power_supply_propval *val)
1889*4882a593Smuzhiyun {
1890*4882a593Smuzhiyun 	int volt;
1891*4882a593Smuzhiyun 
1892*4882a593Smuzhiyun 	volt = bq27xxx_read(di, BQ27XXX_REG_VOLT, false);
1893*4882a593Smuzhiyun 	if (volt < 0) {
1894*4882a593Smuzhiyun 		dev_err(di->dev, "error reading voltage\n");
1895*4882a593Smuzhiyun 		return volt;
1896*4882a593Smuzhiyun 	}
1897*4882a593Smuzhiyun 
1898*4882a593Smuzhiyun 	val->intval = volt * 1000;
1899*4882a593Smuzhiyun 
1900*4882a593Smuzhiyun 	return 0;
1901*4882a593Smuzhiyun }
1902*4882a593Smuzhiyun 
1903*4882a593Smuzhiyun static int bq27xxx_simple_value(int value,
1904*4882a593Smuzhiyun 				union power_supply_propval *val)
1905*4882a593Smuzhiyun {
1906*4882a593Smuzhiyun 	if (value < 0)
1907*4882a593Smuzhiyun 		return value;
1908*4882a593Smuzhiyun 
1909*4882a593Smuzhiyun 	val->intval = value;
1910*4882a593Smuzhiyun 
1911*4882a593Smuzhiyun 	return 0;
1912*4882a593Smuzhiyun }
1913*4882a593Smuzhiyun 
1914*4882a593Smuzhiyun static int bq27xxx_battery_get_property(struct power_supply *psy,
1915*4882a593Smuzhiyun 					enum power_supply_property psp,
1916*4882a593Smuzhiyun 					union power_supply_propval *val)
1917*4882a593Smuzhiyun {
1918*4882a593Smuzhiyun 	int ret = 0;
1919*4882a593Smuzhiyun 	struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
1920*4882a593Smuzhiyun 
1921*4882a593Smuzhiyun 	mutex_lock(&di->lock);
1922*4882a593Smuzhiyun 	if (time_is_before_jiffies(di->last_update + 5 * HZ)) {
1923*4882a593Smuzhiyun 		cancel_delayed_work_sync(&di->work);
1924*4882a593Smuzhiyun 		bq27xxx_battery_poll(&di->work.work);
1925*4882a593Smuzhiyun 	}
1926*4882a593Smuzhiyun 	mutex_unlock(&di->lock);
1927*4882a593Smuzhiyun 
1928*4882a593Smuzhiyun 	if (psp != POWER_SUPPLY_PROP_PRESENT && di->cache.flags < 0)
1929*4882a593Smuzhiyun 		return -ENODEV;
1930*4882a593Smuzhiyun 
1931*4882a593Smuzhiyun 	switch (psp) {
1932*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_STATUS:
1933*4882a593Smuzhiyun 		ret = bq27xxx_battery_status(di, val);
1934*4882a593Smuzhiyun 		break;
1935*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_VOLTAGE_NOW:
1936*4882a593Smuzhiyun 		ret = bq27xxx_battery_voltage(di, val);
1937*4882a593Smuzhiyun 		break;
1938*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_PRESENT:
1939*4882a593Smuzhiyun 		val->intval = di->cache.flags < 0 ? 0 : 1;
1940*4882a593Smuzhiyun 		break;
1941*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CURRENT_NOW:
1942*4882a593Smuzhiyun 		ret = bq27xxx_battery_current(di, val);
1943*4882a593Smuzhiyun 		break;
1944*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CAPACITY:
1945*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.capacity, val);
1946*4882a593Smuzhiyun 		break;
1947*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CAPACITY_LEVEL:
1948*4882a593Smuzhiyun 		ret = bq27xxx_battery_capacity_level(di, val);
1949*4882a593Smuzhiyun 		break;
1950*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_TEMP:
1951*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.temperature, val);
1952*4882a593Smuzhiyun 		if (ret == 0)
1953*4882a593Smuzhiyun 			val->intval -= 2731; /* convert decidegree k to c */
1954*4882a593Smuzhiyun 		break;
1955*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_NOW:
1956*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.time_to_empty, val);
1957*4882a593Smuzhiyun 		break;
1958*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_TIME_TO_EMPTY_AVG:
1959*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.time_to_empty_avg, val);
1960*4882a593Smuzhiyun 		break;
1961*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_TIME_TO_FULL_NOW:
1962*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.time_to_full, val);
1963*4882a593Smuzhiyun 		break;
1964*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_TECHNOLOGY:
1965*4882a593Smuzhiyun 		if (di->opts & BQ27XXX_O_MUL_CHEM)
1966*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_TECHNOLOGY_UNKNOWN;
1967*4882a593Smuzhiyun 		else
1968*4882a593Smuzhiyun 			val->intval = POWER_SUPPLY_TECHNOLOGY_LION;
1969*4882a593Smuzhiyun 		break;
1970*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CHARGE_NOW:
1971*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(bq27xxx_battery_read_nac(di), val);
1972*4882a593Smuzhiyun 		break;
1973*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CHARGE_FULL:
1974*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.charge_full, val);
1975*4882a593Smuzhiyun 		break;
1976*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CHARGE_FULL_DESIGN:
1977*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->charge_design_full, val);
1978*4882a593Smuzhiyun 		break;
1979*4882a593Smuzhiyun 	/*
1980*4882a593Smuzhiyun 	 * TODO: Implement these to make registers set from
1981*4882a593Smuzhiyun 	 * power_supply_battery_info visible in sysfs.
1982*4882a593Smuzhiyun 	 */
1983*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
1984*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
1985*4882a593Smuzhiyun 		return -EINVAL;
1986*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_CYCLE_COUNT:
1987*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.cycle_count, val);
1988*4882a593Smuzhiyun 		break;
1989*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_ENERGY_NOW:
1990*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.energy, val);
1991*4882a593Smuzhiyun 		break;
1992*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_POWER_AVG:
1993*4882a593Smuzhiyun 		ret = bq27xxx_battery_pwr_avg(di, val);
1994*4882a593Smuzhiyun 		break;
1995*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_HEALTH:
1996*4882a593Smuzhiyun 		ret = bq27xxx_simple_value(di->cache.health, val);
1997*4882a593Smuzhiyun 		break;
1998*4882a593Smuzhiyun 	case POWER_SUPPLY_PROP_MANUFACTURER:
1999*4882a593Smuzhiyun 		val->strval = BQ27XXX_MANUFACTURER;
2000*4882a593Smuzhiyun 		break;
2001*4882a593Smuzhiyun 	default:
2002*4882a593Smuzhiyun 		return -EINVAL;
2003*4882a593Smuzhiyun 	}
2004*4882a593Smuzhiyun 
2005*4882a593Smuzhiyun 	return ret;
2006*4882a593Smuzhiyun }
2007*4882a593Smuzhiyun 
2008*4882a593Smuzhiyun static void bq27xxx_external_power_changed(struct power_supply *psy)
2009*4882a593Smuzhiyun {
2010*4882a593Smuzhiyun 	struct bq27xxx_device_info *di = power_supply_get_drvdata(psy);
2011*4882a593Smuzhiyun 
2012*4882a593Smuzhiyun 	cancel_delayed_work_sync(&di->work);
2013*4882a593Smuzhiyun 	schedule_delayed_work(&di->work, 0);
2014*4882a593Smuzhiyun }
2015*4882a593Smuzhiyun 
2016*4882a593Smuzhiyun int bq27xxx_battery_setup(struct bq27xxx_device_info *di)
2017*4882a593Smuzhiyun {
2018*4882a593Smuzhiyun 	struct power_supply_desc *psy_desc;
2019*4882a593Smuzhiyun 	struct power_supply_config psy_cfg = {
2020*4882a593Smuzhiyun 		.of_node = di->dev->of_node,
2021*4882a593Smuzhiyun 		.drv_data = di,
2022*4882a593Smuzhiyun 	};
2023*4882a593Smuzhiyun 
2024*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&di->work, bq27xxx_battery_poll);
2025*4882a593Smuzhiyun 	mutex_init(&di->lock);
2026*4882a593Smuzhiyun 
2027*4882a593Smuzhiyun 	di->regs       = bq27xxx_chip_data[di->chip].regs;
2028*4882a593Smuzhiyun 	di->unseal_key = bq27xxx_chip_data[di->chip].unseal_key;
2029*4882a593Smuzhiyun 	di->dm_regs    = bq27xxx_chip_data[di->chip].dm_regs;
2030*4882a593Smuzhiyun 	di->opts       = bq27xxx_chip_data[di->chip].opts;
2031*4882a593Smuzhiyun 
2032*4882a593Smuzhiyun 	psy_desc = devm_kzalloc(di->dev, sizeof(*psy_desc), GFP_KERNEL);
2033*4882a593Smuzhiyun 	if (!psy_desc)
2034*4882a593Smuzhiyun 		return -ENOMEM;
2035*4882a593Smuzhiyun 
2036*4882a593Smuzhiyun 	psy_desc->name = di->name;
2037*4882a593Smuzhiyun 	psy_desc->type = POWER_SUPPLY_TYPE_BATTERY;
2038*4882a593Smuzhiyun 	psy_desc->properties = bq27xxx_chip_data[di->chip].props;
2039*4882a593Smuzhiyun 	psy_desc->num_properties = bq27xxx_chip_data[di->chip].props_size;
2040*4882a593Smuzhiyun 	psy_desc->get_property = bq27xxx_battery_get_property;
2041*4882a593Smuzhiyun 	psy_desc->external_power_changed = bq27xxx_external_power_changed;
2042*4882a593Smuzhiyun 
2043*4882a593Smuzhiyun 	di->bat = power_supply_register_no_ws(di->dev, psy_desc, &psy_cfg);
2044*4882a593Smuzhiyun 	if (IS_ERR(di->bat))
2045*4882a593Smuzhiyun 		return dev_err_probe(di->dev, PTR_ERR(di->bat),
2046*4882a593Smuzhiyun 				     "failed to register battery\n");
2047*4882a593Smuzhiyun 
2048*4882a593Smuzhiyun 	bq27xxx_battery_settings(di);
2049*4882a593Smuzhiyun 	bq27xxx_battery_update(di);
2050*4882a593Smuzhiyun 
2051*4882a593Smuzhiyun 	mutex_lock(&bq27xxx_list_lock);
2052*4882a593Smuzhiyun 	list_add(&di->list, &bq27xxx_battery_devices);
2053*4882a593Smuzhiyun 	mutex_unlock(&bq27xxx_list_lock);
2054*4882a593Smuzhiyun 
2055*4882a593Smuzhiyun 	return 0;
2056*4882a593Smuzhiyun }
2057*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(bq27xxx_battery_setup);
2058*4882a593Smuzhiyun 
2059*4882a593Smuzhiyun void bq27xxx_battery_teardown(struct bq27xxx_device_info *di)
2060*4882a593Smuzhiyun {
2061*4882a593Smuzhiyun 	/*
2062*4882a593Smuzhiyun 	 * power_supply_unregister call bq27xxx_battery_get_property which
2063*4882a593Smuzhiyun 	 * call bq27xxx_battery_poll.
2064*4882a593Smuzhiyun 	 * Make sure that bq27xxx_battery_poll will not call
2065*4882a593Smuzhiyun 	 * schedule_delayed_work again after unregister (which cause OOPS).
2066*4882a593Smuzhiyun 	 */
2067*4882a593Smuzhiyun 	poll_interval = 0;
2068*4882a593Smuzhiyun 
2069*4882a593Smuzhiyun 	cancel_delayed_work_sync(&di->work);
2070*4882a593Smuzhiyun 
2071*4882a593Smuzhiyun 	power_supply_unregister(di->bat);
2072*4882a593Smuzhiyun 
2073*4882a593Smuzhiyun 	mutex_lock(&bq27xxx_list_lock);
2074*4882a593Smuzhiyun 	list_del(&di->list);
2075*4882a593Smuzhiyun 	mutex_unlock(&bq27xxx_list_lock);
2076*4882a593Smuzhiyun 
2077*4882a593Smuzhiyun 	mutex_destroy(&di->lock);
2078*4882a593Smuzhiyun }
2079*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(bq27xxx_battery_teardown);
2080*4882a593Smuzhiyun 
2081*4882a593Smuzhiyun MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
2082*4882a593Smuzhiyun MODULE_DESCRIPTION("BQ27xxx battery monitor driver");
2083*4882a593Smuzhiyun MODULE_LICENSE("GPL");
2084